About HDMI CLOCK

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

About HDMI CLOCK

1,530 次查看
yitang
Contributor I

HI,FSL,In my item,we think the hdmi clock output is error,we check the clock is :

   clk[IMX6QDL_CLK_HDMI_ISFR]    = imx_clk_gate2("hdmi_isfr",     "pll3_pfd1_540m",    base + 0x70, 4);

is the hdmi clock source "pll3_pfd1_540m"?

标签 (1)
0 项奖励
回复
2 回复数

1,428 次查看
igorpadykov
NXP Employee
NXP Employee

Hi yi

yes seems this is correct as from Table 18-3. System Clocks, Gating, and Override
i.MX6DQ Reference Manual isfrclk has clock source as video_27m_clk_root and it has
source as  "pll3_pfd1_540m" according to
Figure 18-3. Clock Tree - Part 2, VIDEO_27M_CLK_ROOT,
https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf


Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励
回复

1,428 次查看
yitang
Contributor I

in my code, the clock setting is below:

   clk[IMX6QDL_CLK_HDMI_ISFR]    = imx_clk_gate2("hdmi_isfr",     "pll3_pfd1_540m",    base + 0x70, 4);

but the hdmi clock is not booting in kernel,why?

0 项奖励
回复