Dear NXP,
HW: imx8mpluse platform
You can refer the MX8M_Plus_MicronLPDDR4_2G_RAM.xlsx . The DDR calibratiob test is OK.(1500MHz)
I want to do a DDR reduction clock test. About "Clock Cycle Freq (MHz)3 " item,
I select 1400MHz/1300/MHz/1200MHZ to do DDR calibration test .
test result : fail.
May you provide me with 3 clock setting of frequency options below 1500 Mhz?
I hope it can pass the DDR calibration test.
Hi @t2865k5,
The RPA provides the DRAM_PLL_FDIV_CTL0 register (0x30360054) setting for 1500Mhz (0xFA080). For frequencies other than 1500Mhz, it is up to the user to create the appropriate register setting for the desired frequency. Formula is DDR_freq = [(24MHz x pll_main_div)/(pll_pre_div x 2^pll_post_div)] x 2
Hope this helps you.
Regards,
Israel.