AC timing of IPUx_CSI input signals.

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AC timing of IPUx_CSI input signals.

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takayuki_ishii
Contributor III

hello community,

I have some questions about AC timing of IPUx_CSI signals.

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In datashee of i.MX6DQAEC, it have a timing characteristics of IPU CLK and DATA.

Which is a correct answer to major a each parameters.

    1) Is start point of Tsu

        1-1) center of the IPU_CSI_DATA signal? (OVDD*0.5)

        1-2) Vih or Vil of the IPU_CSI_DATA signal? (OVDD*0.7) or (OVDD*0.3)

   2) Is end of Tsu

        2-1) center of the IPU_CSI_CLK signal? (OVDD*0.5)

        2-2) Vih or Vil of the IPU_CSI_CLK signal? (OVDD*0.7) or (OVDD*0.3)

   3) Is start point of Thd

        3-1) center of the IPU_CSI_CLK signal? (OVDD*0.5)

        3-2) Vih or Vil of the IPU_CSI_CLK signal? (OVDD*0.7) or (OVDD*0.3)

   4) Is end point of Thd

        3-1) center of the IPU_CSI_DATA signal? (OVDD*0.5)

        3-2) Vih or Vil of the IPU_CSI_DATA signal? (OVDD*0.7) or (OVDD*0.3)

I am looking forward to hearing from you.

Best regards,

Ishii.

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joanxie
NXP TechSupport
NXP TechSupport

refer to the figure, tsu starts valid data signal, end referenced from a low-to-high transition of the pixel clock for 2:1, for CSI should be different mode, like gated mode, non-gated mode, for different mode, one can refer to the Reference Manual to get detailed information.

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takayuki_ishii
Contributor III

Hello Joan,

Thank you for your response.

I will refer the Reference Manual to understand a detail of each mode.

Best regards,

Ishii.

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