6UL Simplified power design ?

[SJA]

We have a design with no need for any power saving modes.

Can we use a simplified power design with two rails 3.3v and 1.35v ?

1.35v would feed VDD_SOC_IN and NVCC_DRAM (and DRAM VCC)

3.3v would feed VDD_HIGH_IN, VDD_SNVS_IN and the other NVCC peripheral rails.

[igorpadykov]

Hi SJA

yes seems this is possible, also power-up sequence should be

observed.

Best regards

igor

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