Suggestions for using UART of i.mx6 for receive 0xFF continuously

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Suggestions for using UART of i.mx6 for receive 0xFF continuously

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Suggestions for using UART of i.mx6 for receive 0xFF continuously

This article will describe one suggestion for one issue that UART continuously generate RX interrupts and receive 0xFF even when Rx line is continuously high in some cases on imx6 series.

Below I will explain with imx6DL. Some settings are just to make it easier to reproduce.

BSP version: L5.4.70-2.3.0


When issue happen

  1. Config imx6DL UART3 as the serial port to 1200 baud, 8-N-1 format.
  2. Keep the RX Line high.
  3. Make the RX line low and keep it for a short time (360 usec-370 usec).


At this condition, you will find that the UART will continuously generate RX interrupts and show receiving 0xFF even you make the RX line return to be high.

Why issue happen

The low time is not in the correct range and out of our spec.

In the imx6DL AEC document, there is one chapter named UART Receiver like blow



If using 1200 band, that means one valid bit time is 833 usec. And there is a definition that “tolerate 1/(16 x Fbaud_rate) tolerance in each bit”. That’s means in the case of 1200 baud. A range of valid bit is 781 to 885 usec. But is reproducing, the Low level time is 360 usec. This time out of range will make UART state machine to be confused.

How to fix

Actually, the best way is following our spec. If there is such an unknown situation in the customer’s environment, then the following method could be regarded as a suggestion to fix the issue meet by the customer.

The interrupt handler will check USR1[AWAKE].

2    If AWAKE is asserted, clear it and proceed as usual (assume we have valid data), else, check if USR1[AGTIM] is asserted.

3    if AGTIM is asserted, clear it and proceed as usual, else perform software reset (assume we have invalid data).

Checking AGTIM is for one race condition when the RX fifo has some characters (less than RXTL) but no more data is coming in.

When following this procedure, the UART will perform a software reset when a block interrupt occurs.

Notes: From customer report, error could be cleared if a valid start-bit is detected on the RX line. This needs to be verified by the customer themselves.

Test code has been included in attachment.


Besst Regards

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‎08-29-2021 05:54 PM
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