Hello, hope you are doing well.
Both lpspi0 and lpspi1 are already declared at the SoC level in zephyr/dts/arm/nxp/mcx/nxp_mcxw7x_common.dtsi with all required hardware properties (registers, interrupts, clocks, FIFO sizes), but set to status = "disabled" by default. The board file frdm_mcxw71.dts only enables lpspi1 but lpspi0 can be enabled in the same way through your application overlay file.
You can take the existing lpspi1 configuration as reference. The basic overlay would look something like this, which you can then extend with your custom device implementation:
&pinctrl {
pinmux_lpspi0: pinmux_lpspi0 {
group0 {
pinmux = <LPSPI0_SIN_PTA17>,
<LPSPI0_SCK_PTA19>,
<LPSPI0_SOUT_PTA18>,
<LPSPI0_PCS0_PTA16>;
slew-rate = "fast";
drive-strength = "low";
};
};
};
&lpspi0 {
status = "okay";
pinctrl-0 = <&pinmux_lpspi0>;
pinctrl-names = "default";
};
Best regards,
Sofia.