I2S on RW612 with Zephyr

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I2S on RW612 with Zephyr

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_arthur_
Contributor II

Hello,

 

I'm trying to use the I2S from flexcomm3 on my Zephyr project. I'm currently struggling to find the correct configuration. Moreover, I'm currently using the FRDM-RW612 evaluation board and I also have the USART on the flexcomm3.

In my overlay, I have:

&flexcomm3 {
    pinctrl-0 = <&pinmux_flexcomm3_usart>, <&pinmux_flexcomm3_i2s>;
    pinctrl-names = "default";
    
    // Configuration I2S
    i2s3: i2s {
        compatible = "nxp,lpc-i2s";
		reg = <0x109000 0x1000>;
		interrupts = <17 0>;
        status = "okay";
    };
};

&hsgpio0 {
	status = "okay";
};

&pinctrl {

	pinmux_flexcomm3_i2s: pinmux_flexcomm3_i2s {
		group0 {
			pinmux = <2 3>, <3 3>, <4 3>, <5 3>;
			slew-rate = "normal";
		};
	};

	pinmux_rgb_leds: pinmux_rgb_leds {
		group0 {
			pinmux = <1 0>, <12 0>, <0 0>;
			slew-rate = "normal";
		};
	};
};

 

But if I execute "cmake --preset debug" I get:

 

devicetree error: 'reg' property in <Node /soc/peripheral@50000000/flexcomm@109000/i2s in 'C:/NXP/Zephyr/zephyr/zephyr/misc/empty_file.c'> has length 8, which is not evenly divisible by 12 (= 4*(<#address-cells> (= 2) + <#size-cells> (= 1))). Note that #*-cells properties come either from the parent node or from the controller (in the case of 'interrupts').

 

I cannot find any sample code for Zephyr. Can anyone help me on this?

 

Thank you !

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_, hope you are doing well.

If you are usign the FRDM-RW612 I would recommend to use flexcomm1 as your I2S instance since it is easy to access through the Arduino headers (J1.15 - I2S DATA, J1.13 - I2S WS, J1.9 - I2S SCK), while flexcomm3 pins are routed to the MCU-Link and trying to use them for I2S would require a re-work.

Regarding your overlay, by default flexcomm1 is used as SPI interface, therefore you would need to change the description of flexcomm1 to be only compatible with "nxp,lpc-i2s" (you can define only 1 functionality for each flexcomm) and add I2S pins defined as "pinmux_flexcomm1_i2s".

RomanVR_1-1758576785664.png

Additionally, in order to test your I2S instance I suggest to use the example "i2s_api" which is a testbench that runs different APIs using I2S driver in your board. Note: If you use this example, you need to add an alias "i2s-node0" associated with the modified flexcomm1 definition.

Please let me know if this information is helpful.

Best Regards!
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_arthur_
Contributor II

Hello @RomanVR 

Thanks for your reply. In the meantime I was able to move forward, I can now compile but I don't see any signals on the I2S when I expect something.

 

I'm using Flexcomm0 because that's the one I'll use on my custom board.

_arthur__0-1758581201615.png

So I'm reading GPIO2 to GPIO 5 with my logic analyzer.

Here is my new overlay:

#include <nxp/rw/RW612-pinctrl.h>

/ {
	aliases {
		i2c-0 = &flexcomm2;
		i2s-tx = &flexcomm0;
		led0 = &red_led;
		led1 = &green_led;
		led2 = &blue_led;
	};

	leds {
		compatible = "gpio-leds";
		red_led: led_0 {
			gpios = <&hsgpio0 1 GPIO_ACTIVE_LOW>;
			label = "Red LED";
		};
		green_led: led_1 {
			gpios = <&hsgpio0 12 GPIO_ACTIVE_LOW>;
			label = "Green LED";
		};
		blue_led: led_2 {
			gpios = <&hsgpio0 0 GPIO_ACTIVE_LOW>;
			label = "Blue LED";
		};
	};
};

&flexcomm2 {
    adau1761: adau1761@38 {
        compatible = "adi,adau1761";
        reg = <0x38>;
        status = "okay";
    };
};

&flexcomm0 {
	compatible = "nxp,lpc-i2s";
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-0 = <&pinmux_flexcomm0_i2s>;
	pinctrl-names = "default";
	/delete-property/ current-speed;
	status = "okay";
};

&hsgpio0 {
	status = "okay";
};

&pinctrl {

	pinmux_flexcomm0_i2s: pinmux_flexcomm0_i2s {
		group0 {
			pinmux = <IO_MUX_FC0_I2S>;
			slew-rate = "normal";
		};
	};

	pinmux_rgb_leds: pinmux_rgb_leds {
		group0 {
			pinmux = <1 0>, <12 0>, <0 0>;
			slew-rate = "normal";
		};
	};
};

I attached my code for the audio_player. Can you please let me know if you see an issue in this implementation?

Thank you !

 

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_, hope you are doing well.


I have tried the example "i2s_speed" from the NXP Downstream Zephyr repository with version 4.2.0 and it works properly and I'm able to see the signals with a logic analyzer. Please make sure that you are making the connections to the following headers/pins of the FRDM-RW612:

  • GPIO_2 (I2S DATA) - Connected to J5.3 (Mikro Bus TX) 
  • GPIO_3 (I2S WS) - Connected to J5.4 (Mikro Bus RX)
  • GPIO_4 (I2S BCLK) - Connected to J1.1

Please notice that these signals are not all connected to header J1 as shown in "RW612 SOC Signals" section of the FRDM-RW612 Schematic file available at the product page.

Let me know if this information is helpful.

Best Regards!
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_arthur_
Contributor II

How can you compile and run this example?

I'm using VSCode with the MCUxpresso plugin but when I'm trying to import the project folder, it says there is no project in the folder.

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_.

Inside the MCUXpresso extension for VSCode click on "Import Example from Repository" in the "Quickstart Panel" view. Here select your repository from your "Imported Repositories" section, the board, and the search for the project in the "Template" section.

Please notice that for Zephyr version 4.2.0 is required to have zephyr-sdk-0.17.2

RomanVR_0-1758745644713.png

RomanVR_0-1758815759465.png

Please let me know if these steps are helpful.

Best Regards!
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_arthur_
Contributor II

Hello @RomanVR 

I'm able to compile and run i2s_speed but it still flat on the signals. I must be missing something.

First, about the SDK, there are the "Zephyr" and the "NXP Zephyr". Which one should I use? (I tried both and the result is the same)

Then, the output of i2s_speed when I run it is:

*** Booting Zephyr OS build nxp-v4.1.0-23883-g5fbcfde7cfc2 ***
Running TESTSUITE drivers_i2s_speed
===================================================================
START - test_i2s_transfer_long_44100
20 TX blocks sent
20 RX blocks received
 PASS - test_i2s_transfer_long_44100 in 0.031 seconds
===================================================================
START - test_i2s_transfer_short_08000
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_08000 in 0.028 seconds
===================================================================
START - test_i2s_transfer_short_16000
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_16000 in 0.016 seconds
===================================================================
START - test_i2s_transfer_short_32000
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_32000 in 0.010 seconds
===================================================================
START - test_i2s_transfer_short_44100
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_44100 in 0.008 seconds
===================================================================
START - test_i2s_transfer_short_48000
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_48000 in 0.008 seconds
===================================================================
START - test_i2s_transfer_short_88200
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_88200 in 0.006 seconds
===================================================================
START - test_i2s_transfer_short_96000
0->OK
1->OK
2->OK
1<-OK
2<-OK
3<-OK
 PASS - test_i2s_transfer_short_96000 in 0.006 seconds
===================================================================
TESTSUITE drivers_i2s_speed succeeded
Running TESTSUITE drivers_i2s_speed_both_rxtx
===================================================================
START - test_i2s_dir_both_transfer_long_44100
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_long_44100 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_08000
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_08000 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_16000
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_16000 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_32000
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_32000 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_44100
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_44100 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_48000
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_48000 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_88200
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_88200 in 0.004 seconds
===================================================================
START - test_i2s_dir_both_transfer_short_96000
I2S_DIR_BOTH value is not supported.
 SKIP - test_i2s_dir_both_transfer_short_96000 in 0.004 seconds
===================================================================
TESTSUITE drivers_i2s_speed_both_rxtx succeeded

------ TESTSUITE SUMMARY START ------

SUITE PASS - 100.00% [drivers_i2s_speed]: pass = 8, fail = 0, skip = 0, total = 8 duration = 0.113 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_long_44100] duration = 0.031 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_08000] duration = 0.028 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_16000] duration = 0.016 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_32000] duration = 0.010 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_44100] duration = 0.008 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_48000] duration = 0.008 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_88200] duration = 0.006 seconds
 - PASS - [drivers_i2s_speed.test_i2s_transfer_short_96000] duration = 0.006 seconds

SUITE SKIP -   0.00% [drivers_i2s_speed_both_rxtx]: pass = 0, fail = 0, skip = 8, total = 8 duration = 0.032 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_long_44100] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_08000] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_16000] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_32000] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_44100] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_48000] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_88200] duration = 0.004 seconds
 - SKIP - [drivers_i2s_speed_both_rxtx.test_i2s_dir_both_transfer_short_96000] duration = 0.004 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

 

I took some photos of my setup in case you see something obvious. Thanks for your help

PXL_20250926_081521064.jpgPXL_20250926_081534857.jpgPXL_20250926_081551979.jpg

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RomanVR
NXP Employee
NXP Employee

Hi @_arthur_.

I can see some issues with your connections, please refer to the image below in order to do the connections for the example to work properly.

RomanVR_0-1759179823490.png

Notice that the example stablishes communication between two I2S  instances (tx and rx) changing the frame frequency at a certain time.

Please let me know if these connections allow you to see the signals.

 

Best Regards!
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_arthur_
Contributor II

Hello @RomanVR 

Ok now I better understand the way connectors on the FRDM-RW612 are connected (or not) based on the onboard jumpers. (you mixed J1 and J2 on your picture but it forced me to look deeper in the frdm_rw612 schematics )

I'm now able to see the I2S signal.

I understand now that FC1 is the transmitter and FC0 the receiver. Unfortunately, it's not exactly my setup for my future custom board. I want FC0 to be the transmitter.

So, I tried to change these lines and invert i2s_node1 and i2s_node0:

#define I2S_DEV_NODE_RX DT_ALIAS(i2s_node1)
#ifdef CONFIG_I2S_TEST_SEPARATE_DEVICES
#define I2S_DEV_NODE_TX DT_ALIAS(i2s_node0)
#else
#define I2S_DEV_NODE_TX DT_ALIAS(i2s_node0)
#endif

 Then, I only see the BCLK, but nothing on WS and DATA. And everything is failing.

By the way, how can I generate the MCLK (my audio adc needs it) on GPIO_5_MCLK?

Thank you for your help, I can see progress eventually !

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_.

I have done the same changes on the example project as you and I'm still able to see the I2S signals properly. Please see the images below:

RomanVR_0-1759254355766.png

RomanVR_1-1759254373441.png

RomanVR_2-1759254420414.png

Please let me know if you are able to reproduce this behavior and if your Flexcomm/I2S instances are getting properly assigned in your device tree source.

Best Regards!
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_arthur_
Contributor II

Hello Roman,

I saw you corrected your picture for the connection, the I2S_SCK connection on J2 is still wrong though. It should be the pin 12 not 8.

My mistake was on the connector J5, I used pins 2 and 3 and not 3 and 4.

Now it is working as expected.

What about the MCLK signal. How can I generate this clock for an audio DAC that requires it?

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_.

Regarding the MCLK generation, I am checking this internally. As soon as I have any recommendation, I will let you know.

Thank you for your patience!

Best Regards!
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_arthur_
Contributor II

Hello Roman,

Any news about the MCLK generation? My audio codec cannot operate without it. It uses this clock to run its core.

Thanks for your help,

Arthur

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_, sorry for the late reply, I hope you are doing well.

In order to add the MCLK output configuration, first you need to generate the required configuration of the MCLK clock and pin, I suggest to do this with "ConfigTools" which is a tool inside the MCUXpresso IDE that allows to configure your MCU's clock tree and pins and writes the API's to do so into the files "clock_config.c" and "pinmux.c" and "pinmux.h". Please notice that MCLK pin has to be configured as well with ConfigTools since it is an RW612-specific feature and it cannot be configured with the Zephyr gpio driver (as it is designed to be generic).

RomanVR_0-1761591179940.png

RomanVR_1-1761591214475.png

Once generated the required clock configuration, copy-paste it into the function "__weak__ramfunc void clock init(void)" which is located at the path: c:/My_Zephyr_Repo_path/zephyr/soc/nxp/rw.

Since this function is declared as "__weak__" you can copy-paste it on your main file (which will re-define the function) and add the clock configuration. Regarding the pin configuration, just copy-paste it into your main file.

Additionally, make sure to add the following includes to your main file (or the file where you add your custom configurations):

#include <fsl_power.h>
#include <fsl_clock.h>
#include <fsl_common.h>
#include <fsl_device_registers.h>
#include "soc.h"
#include "flexspi_clock_setup.h"
#include "fsl_ocotp.h"
#include "fsl_common.h"
#include "fsl_io_mux.h"

Please let me know if this information helps.

Best Regards!
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_arthur_
Contributor II

Hello Roman,

I took the time to follow your intructions and it seems to work. I'll do more tests to confirm.

Thanks for your help,

Arthur

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RomanVR
NXP Employee
NXP Employee

Hello @_arthur_.

We are sorry for the delay on this matter, we are still checking this internally, I will let you know further updates.

Thank you for your patience.

Best Regards!
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