Hi Alice ,
I Scan the .config and could not find any red flags their. I upload the .config as well(had to rename since .config is not supported).
After further investigation into the Zephyr base setup, I noticed the following behavior difference between Zephyr and the MCUX SDK:
Even though the FlexPWM register configuration and values are identical between Zephyr and the SDK, the interrupt is never triggered by the peripheral itself in Zephyr after initialization.
In the MCUX SDK, I can observe that the SM0STS register bits CFB0 and CFB1 are being set periodically, which results in the expected interrupt behavior.
In Zephyr, these same status bits (SM0STS->CFB0 and SM0STS->CFB1) are never set, even though:
During the initial peripheral setup, these bits are automatically set once on both the SDK and Zephyr sides, and both environments execute the IRQ handler once during this initial setup.
However, after this initial IRQ execution, the interrupt status bits are never toggled again in Zephyr, and no further interrupts occur.
In contrast, the MCUX SDK continues to toggle these status bits periodically as expected, resulting in repeated interrupt callbacks.
This suggests that while the initial interrupt path is functional in Zephyr, the FlexPWM peripheral does not continue generating interrupt events afterward, despite identical register configuration.
Any insight into why the FlexPWM status bits (CFB0/CFB1) are not being set in Zephyr, or whether additional Zephyr-specific handling is required to enable periodic interrupt generation, would be greatly appreciated.