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When learning Zephyr, there are lots of questions about memory. Where does the linker place code and data? How does the application configure to use other memories?
The default memory sections used by the linker are configured in the devicetree. Typically the devicetree uses chosen nodes to configure these sections. Here is an example from the board MIMXRT1060-EVK:
chosen {
zephyr,flash = &is25wp064;
zephyr,sram = &sdram0;
};
The names of these chosen nodes can be misleading. zephyr,flash
points to the node the linker uses for all the code (.text) and read-only data sections. Typically this points to physical flash memory, like on this board it places in external QSPI flash, but it can be in memory that is not flash. zephyr,sram
points to the node the linker uses for all the .data and .bss sections. This should be in RAM, but is not required to be in SRAM. This board places in the external SDRAM. The application can point these nodes to other memories that are best for that app. Other common memory nodes used are &dtcm
, &itcm
, or &ocram
.
Typically, these chosen nodes are set in the board devicetree file. But when learning Zephyr and working with devicetree, it is best to confirm the devicetree settings in the generated devicetree files created during the build of the application, see Lab Guide: Devicetree and VS Code Devicetree Viewer.
Most memory questions come from those using the i.MX RT devices. These MCUs are high-performance flashless devices with multiple internal and external memory options to maximize performance and flexibility for the application. Some helpful resources specific to the i.MX RT devices:
Relocating code to RAM is a common requirement, like to maximize performance, or reduce power consumption. With Zephyr, applications can relocate all the code, or part of the code to RAM. Some helpful resources for relocation:
With Zephyr, the default placement of all data, variables, and stacks go in the zephyr,sram
node. But some applications want some specific data to be placed elsewhere. Like placing data in DTCM to maximize performance, placing a DMA buffer in non-cacheable memory, or moving large frame buffers for a display to external RAM. Some helpful resources for specifying data placement include:
dma_tcdpool
structures in the __dtcm_noinit_section
or __nocache
sections.zephyr,modelbuf
in the devicetree, which points to the memory section node sramx
. To use this method, the memory section node requires the property zephyr,memory-region
. In the source code, the model_input_buf
buffer is declared with the zephyr_modelbuf
node. Then the linker places model_input_buf
in the sramx
section.
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