Hi @Aladdine,
You are stuck at 6MHz because you have not considered all the clock dividers.
Starting with the lpspi_interrupt_b2b_master example from the SDK, below are the things to take into consideration:
- The clock for peripherals is generated by the MRCC block from the FIRC (Fast Internal Reference Clock):

The FIRC range is configured via the below configuration and APIs:
[clock_config.c file]

And the above configuration set the FIRC clock to 96MHz and is applied in the void BOARD_BootClockRUN(void) API:

- Each peripheral have a dedicated MRCC register to configure the source clock of the MRCC of this peripheral and a divider to scale the output clock:

This action is performed in the main() function here:

As you can see, by default, the source frequency of the LPSPI0 is equal to 6MHz, which represents the limitation you are seeing.
Therefore, when calling LPSPI_MasterInit() API, the baudrate calculation is based on this frequency value, which is lower than 10MHz!
To get to 9.6MHz, the easiest solution is to change the divider from 16 to a value compromised between 1 and 9.
I personally tested with a divider set to 1 (kSCG_SysClkDivBy1) and I managed to get a source clock for the LPSPI0 to 9.6MHz:

Please try this and let us know if you can get the LPSPI0 clock to 9.6MHz.
Regards,
Alex