I am working on a custom PCB with an RW610 MCU and running Zephyr RTOS. Before using Zephyr, I worked with FreeRTOS and the NXP HAL directly.
On that old firmware, I was able to use an external JLink debugger to reset/program the board even while running. After switching to Zephyr, I can no longer flash while the board is running. I get the message DAP failed to initialize.
On the custom board I do have a BOOT button which can force the board into ISP boot when powered off/on. Using this, I can flash my Zephyr code. However, I lose the ability to debug the code with GDB because when the board is flashed in ISP mode I can't reset it through the JLink.
J-Link Command File read successfully. Processing script file... J-Link>ExitOnError 1 J-Link Commander will now exit on Error J-Link>r J-Link connection not established yet but required for command. Connecting to J-Link via USB...O.K. Firmware: J-Link V13 compiled Sep 17 2025 12:01:59 Hardware version: V13.00 J-Link uptime (since boot): 0d 00h 06m 24s S/N: 53002466 License(s): GDB USB speed mode: High speed (480 MBit/s) VTref=3.325V Target connection not established yet but required for command. Device "RW610" selected.
Connecting to target via SWD InitTarget() start SWD selected. Executing JTAG -> SWD switching sequence. DAP initialized successfully. DMAP_REG_ID: DM-AP IDCODE detected: 0x002A0000 DHCSR: 0xFFFFFFFF ROM entered ISP command handling loop. Re-enable the debug access. InitTarget() end - Took 14.0ms Found SW-DP with ID 0x6BA02477 DPIDR: 0x6BA02477 CoreSight SoC-400 or earlier Scanning AP map to find all available APs AP[1]: Stopped AP scan as end of AP map has been reached AP[0]: AHB-AP (IDR: 0x84770001, ADDR: 0x00000000) Iterating through AP map to find AHB-AP to use AP[0]: Core found AP[0]: AHB-AP ROM base: 0xE00FF000 CPUID register: 0x410FD214. Implementer code: 0x41 (ARM) Feature set: Mainline Cache: No cache Found Cortex-M33 r0p4, Little endian. FPUnit: 8 code (BP) slots and 0 literal slots Security extension: implemented Secure debug: enabled CoreSight components: ROMTbl[0] @ E00FF000 [0][0]: E000E000 CID B105900D PID 000BBD21 DEVARCH 47702A04 DEVTYPE 00 Cortex-M33 [0][1]: E0001000 CID B105900D PID 000BBD21 DEVARCH 47701A02 DEVTYPE 00 DWT [0][2]: E0002000 CID B105900D PID 000BBD21 DEVARCH 47701A03 DEVTYPE 00 FPB [0][3]: E0000000 CID B105900D PID 000BBD21 DEVARCH 47701A01 DEVTYPE 43 ITM [0][5]: E0041000 CID B105900D PID 002BBD21 DEVARCH 47724A13 DEVTYPE 13 ETM [0][6]: E0042000 CID B105900D PID 000BBD21 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI Memory zones: Zone: "Default" Description: Default access mode Cortex-M33 identified. Reset delay: 0 ms ResetTarget() start Reset via SYSRESETREQ and reset pin + halt after bootloader ROM entered ISP command handling loop. Re-enable the debug access. MSPLIM cleared ResetTarget() end - Took 128ms Device specific reset executed. J-Link>h PC = 1302B460, CycleCnt = 00000000 R0 = 00000000, R1 = 5AC33CA5, R2 = 00000001, R3 = 5AC33CA5 R4 = 3012F5FC, R5 = 50002E24, R6 = 55AACC33, R7 = 33CCAA55 R8 = 5AA55AA5, R9 = FCF0030F, R10= C33CA55A, R11= 55AACC33 R12= 3012F5FC SP(R13)= 30125A38, MSP= 30125A38, PSP= 00000000, R14(LR) = 1302B421 XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException) CFBP = 00000001, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 01 MSPLIM = 00000000 PSPLIM = 00000000
Since the flashing worked when using FreeRTOS I suspect I have something in the devicetree or KConfig configured incorrectly. Is there anything I should look for there? I am using the MCUXpresso VSCode extension on Linux, flashing Zephyr 4.3.0.