PN5180 weird soft reset behaviour

[Splatspeed]

we have two devices and we send a soft reset on both. on one we receive an interrupt and on the other we dont, we receive an interrupt on the non working one if we are toggling the reset line. is there some timing needed or something else that can block a soft reset on this chip, as we don't receive an interrupt.

thx in advance sean

[KaiLi]

Hello Splatspeed,

The reset action does not trigger the interrupt events regardless of software or hardware, the detail you can check IRQ_ENABLE register (address 0001h) bit description. The interrupt event you detected is likely to be related to your application. You can read the status register to see if it is these three errors(LPCD_IRQ, GENERAL_ERROR_IRQ and HV_ERROR_IRQ), they are non-maskable interrupts.

so my suggestion is that IRQ pins can be configured to inactive state depending on your application, Pull-up to Vcc or Pull-down to GND. the level changes on this pin are not allowed to trigger any interrupts.

Best Regards,

Thanks,

kelly

[Splatspeed]

thanks kelly, we are looking to do 2 way communication with these chips, what would be your recommendation. both sides are powered. do you have an Application document to describe the steps. ideally we want a uart replacement using NFC. but cant find any application notes without using your libraries. basically i want a flow chart of the messages and commands i need to your chip to facilitate this. any help is greatly appreciated. also there is nothing in the spec on soft reset or hard reset behavior. or how to confirm it has happened. thx again sean

[KaiLi]

Hello Splatspeed,

1. All interrupts caused by PN5180 can be disabled by configured IRQ_ENABLE register, but except for LPCD_IRQ, GENERAL_ERROR_IRQ and HV_ERROR_IRQ, they  are non-maskable interrupts.

2. All interrupts events caused by PN5180 can be detected by IRQ PIN, but its active level need to be configured by your application.

3. There are two ways to reset PN5180, hardware and software, but reset action does not trigger the interrupt events regardless of software or hardware.

4. so, you want to block a soft reset on this chip, I think you should make sure if this reset action caused by PN5180? Because PN5180 will not actively reset unless RESET_N pin is given a low level or SYSTEM_CONFIG register (address 0000h) bit 8 is written 1.

5. If you don't want to use NXP library to develop then you have to refer to the datasheet how to implement various commands and message exchanges.

Hope the above reply can help you.

Best Regards,

Thanks,

kelly