QN9080 - using ADC and CTIMER

[shai_b]

Hello Team,

My customer has the following inquiries below: 

We need to sample two analog channels with 12 bits at a sample rate of Fs (Fs is in the range
of 500Hz to 10KHz). Our application needs to store N samples (N is in the range of 100 to
1000).
We are using the QN9080 with an internal clock of 32MHz.
We made two tests :
1) With basic and minimal instructions we toggle an IO when configuring the processor
with maximum speed.
In this test, we expected to have an output frequency of at least 5MHz (we expected that each
loop would take no more than 100nSec).
We got a result of 400KHz which means that each loop took about 1250nSec (12.5 times
slower).
Attached please find the software that we built and the confirmation of the processor
(led_test.zip)
a. Please advise.
b. Alternatively, please provide us a short program that can demonstrate a
toggling IO of at least 5 MHz.
2) We programmed a CTIMER triggered interrupt to trigger the ADC to perform a single
sampling every T seconds (T is in the range of 2mSec down to 100nSec).
In addition,
Upon each CTIMER interrupt (which triggered ACD start sample) - we toggled 1st IO -
please find the BLUE channel in Picture 1 and Picture 2
Upen each ADC end of conversion (ACD ready status) - we toggled a 2nd IO - please
find the YELLOW channel in the Picture 1 and Picture 2
Our conclusions from the results are that the ADC conversion time is about 2 mSec (we
need 100uSec).
Attached please find the software that we used.
Attached source code project file name: adc_test.zip

a. Please advise.
b. Alternatively, please provide a short program that interrupts the ADC
every 100nSec and the ADC results are stored in the memory for example 100
samples.
Picture 1:

Picture 2:

I would appreciate your support, thanks in advance.

Kind regards,

Shai

[mario_castaneda]

Hi Shai,

I hope you are doing great. I am checking your issue and get back to you as soon as possible.

Regards,

Mario

[shai_b]

Dear Mario,

The customer was able to sample two channels using BURST mode (of 100 samples per trigger) on two channels,

but he was able to reach only a sample rate of 2.5ksps per channel.

The goal is to sample two ADC channels (in parallel as much as possible) and reach at least a sample rate of 11ksps per channel.

BTW, while using only one ADC channel he was able to reach ~60ksps in burst mode with downsamples of 32 and Clock of 2M. 

Please advise what is the best practice to achieve this?

I am sharing the relevant part of his code for reviewing (using ADC CH4 and CH5), Thanks in advance.

int main(void)
{
uint32_t i;
uint32_t data[ADC_BURST_EXAMPLE_NUMBER];

/* Power on ADC */
POWER_EnableADC(true);

/* Initialize board hardware. */
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitDebugConsole();

/* Configure the converter and work mode. */
ADC_Configuration();

float fresult;

while (1)
{
GETCHAR();

/* Start burst */
ADC_Enable(DEMO_ADC_BASE, true);
/* Do software trigger */
ADC_DoSoftwareTrigger(DEMO_ADC_BASE);
for (i = 0; i < ADC_BURST_EXAMPLE_NUMBER; i++)
{
/* Wait for convert complete */
while (!(ADC_GetStatusFlags(DEMO_ADC_BASE) & kADC_DataReadyFlag))
{
}
/* Get the result */
data[i] = (ADC_Type *)DEMO_ADC_BASE->DATA; // ADC_GetConversionResult(DEMO_ADC_BASE);
}
/* Stop burst */
ADC_Enable(DEMO_ADC_BASE, false);

PRINTF("\r\nCH4: \r\n", fresult);

for (i = 0; i < ADC_BURST_EXAMPLE_NUMBER; i++)
{
fresult = ADC_ConversionResult2Mv(DEMO_ADC_BASE, DEMO_ADC_CHANNEL_4, DEMO_ADC_CFG_IDX, g_AdcBandgap,
g_AdcVinn, data[i]);

if (i % 2 == 0)
{
PRINTF("%f\r\n", fresult);
}
}

PRINTF("\r\nCH5: \r\n", fresult);

for (i = 0; i < ADC_BURST_EXAMPLE_NUMBER; i++)
{
fresult = ADC_ConversionResult2Mv(DEMO_ADC_BASE, DEMO_ADC_CHANNEL_5, DEMO_ADC_CFG_IDX, g_AdcBandgap,
g_AdcVinn, data[i]);

if (i % 2 == 1)
{
PRINTF("%f\r\n", fresult);
}
}

}
}

static void ADC_Configuration(void)
{
adc_config_t adcConfigStruct;
adc_sd_config_t adcSdConfigStruct;

/**
* Initial ADC to default configuration.
*/
ADC_GetDefaultConfig(&adcConfigStruct);
adcConfigStruct.channelEnable = (1U << DEMO_ADC_CHANNEL_4) | (1U << DEMO_ADC_CHANNEL_5);
adcConfigStruct.channelConfig = DEMO_ADC_CFG_IDX;
adcConfigStruct.triggerSource = DEMO_ADC_TRIGGER;    //the TRIGGER is kADC_TriggerSelectSoftware
adcConfigStruct.convMode = kADC_ConvModeBurstScan;
adcConfigStruct.clock = kADC_Clock2M;

ADC_Init(DEMO_ADC_BASE, &adcConfigStruct);

/* Initial ADC Sigma Delta(SD) configuration */
ADC_GetSdDefaultConfig(&adcSdConfigStruct);
adcSdConfigStruct.downSample = kADC_DownSample32;
ADC_SetSdConfig(DEMO_ADC_BASE, DEMO_ADC_CFG_IDX, &adcSdConfigStruct);

/* Bandgap voltage */
g_AdcBandgap = ADC_GetBandgapCalibrationResult(DEMO_ADC_BASE, DEMO_ADC_CFG_IDX);

/* Calibration VINN value */
g_AdcVinn = ADC_GetVinnCalibrationResult(DEMO_ADC_BASE, &adcConfigStruct);
}

I would appreciate your code review and the support to improve the ADC performance?

In addition, I was thinking that if we use a timer as for ADC trigger (now using software trigger) it might improve ADC performance?

Waiting for your kind response, Thanks a lot.

Kind regards,

Shai

[mario_castaneda]

Hi Shai,

Is it possible that you could provide the clock configuration that the customer set?

However, I have been checking your code, and is it possible that you could comment on the PRINTF("%f\r\n", fresult), the QN9080 is printing in terminal a floating variable, the customer could save all this data and print at the end. You could add a ping toggle and be sure the ksps with an oscilloscope instead.

Please let me know if the customer is not achieving the ksps that they want.

Regards,

Mario