RW61X USART FIFOSTAT->RXTIMEOUT

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RW61X USART FIFOSTAT->RXTIMEOUT

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aar
Contributor II

Working with RW612's USART I stumble into the following problem:

I'm enabling the USART RXTIMEOUT interrupt using the SDK-provided API:

 

USART_EnableInterrupts(USART3, kUSART_RxTimeoutInterruptEnable);

 


and I'm also setting the interrupt using the provided API to configure it:

 

    USART_CalcTimeoutConfig(timeMicroSec,
                            &rxTimeoutCfg.prescaler,
                            &rxTimeoutCfg.counter,
                            CLOCK_GetFlexCommClkFreq(flexCommId));
    rxTimeoutCfg.enable = true;
    rxTimeoutCfg.resetCounterOnEmpty = false;
    rxTimeoutCfg.resetCounterOnReceive = true;

    // Disable UART in order to configure timeout
    mp_uartBase->CFG &= ~USART_CFG_ENABLE_MASK;

    USART_SetRxTimeoutConfig(mp_uartBase, &rxTimeoutCfg);
    USART_EnableInterrupts(mp_uartBase, kUSART_RxTimeoutInterruptEnable);

    // Re-enable timeout
    mp_uartBase->CFG |= USART_CFG_ENABLE_MASK;

 

 

The interrupt is triggering as expected, however I'm unable to clear the interrupt.

According to RM00278 28.1.12:

aar_0-1737755838196.png

 

However, from the fsl_usart.c driver (SDK 24.12) we have:

 

    /* Only TXERR, RXERR fields support write. Remaining fields should be set to zero */
    base->FIFOSTAT = mask & (USART_FIFOSTAT_TXERR_MASK | USART_FIFOSTAT_RXERR_MASK);

 


As the fsl driver wouldn't even attempt to clear write the FIFOSTAT->RXTIMEOUT timeout bit I tried to write to it directly:

 

        // Clear the timeout interrupt
        mp_uartBase->FIFOSTAT |= USART_FIFOSTAT_RXTIMEOUT_MASK;

 

 

Unfortunately, this doesn't work and the interrupt is never cleared.

Could you please advise on how RXTIMEOUT interrupt is cleared?

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4 Replies

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Ricardo_Zamora
NXP TechSupport
NXP TechSupport

Hello,

 

Hope you are doing well. Let me check this internally.

 

Best Regards,

Ricardo

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1,416 Views
Ricardo_Zamora
NXP TechSupport
NXP TechSupport

Hello,

 

Thank you for your patience!

 

I was able to clear that bit using the following code on the DEMO_USART_IRQHandler from the usart_interrupt example:

 
 
 
 
 
 
 

rxtimeput.png

 

Best Regards,

Ricardo

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1,379 Views
aar
Contributor II

Ricardo,

Could you please share all the modifications you made to the example code? I'm still unable to clear this flag.

This is how I'm enabling RXTIMEOUT:

DoEnableRxTimeout(double timeoutBytes)
{
    const double rxTimeoutMicroSec{
      std::ceil(((timeoutBytes * m_transmissionSize) / m_baud) * 1000000)};

    usart_rx_timeout_config rxTimeoutCfg{};
    const std::uint32_t flexCommId{GetFlexcommId(mp_uartBase)};

    USART_CalcTimeoutConfig(static_cast<uint32_t>(rxTimeoutMicroSec),
                            &rxTimeoutCfg.prescaler,
                            &rxTimeoutCfg.counter,
                            CLOCK_GetFlexCommClkFreq(flexCommId));
    rxTimeoutCfg.enable = true;
    rxTimeoutCfg.resetCounterOnEmpty = false;
    rxTimeoutCfg.resetCounterOnReceive = true;

    // Disable UART to configure timeout
    mp_uartBase->CFG &= ~USART_CFG_ENABLE_MASK;

    USART_SetRxTimeoutConfig(mp_uartBase, &rxTimeoutCfg);
    USART_EnableInterrupts(mp_uartBase, kUSART_RxTimeoutInterruptEnable);

    // Re-enable UART
    mp_uartBase->CFG |= USART_CFG_ENABLE_MASK;
}
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Ricardo_Zamora
NXP TechSupport
NXP TechSupport

Hello,

 

I just configured the timeout:

Ricardo_Zamora_0-1739480458814.png

 

 

Regards,

Ricardo

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