Greetings, comrades! Have some questions about ethernet switch in Vybrid processor. I'm implementing spanning tree protocol on it, facing some difficulties such as: 1) How can i know from which external port I receive current bpdu frame? What will happen when I receive the same frame from 2 different external ports in short period of time? Is learning fifo is the only one way to get this info?
2) when I'm reading data from learning fifo slower then ESW writes there, will I loss info from new frames? Will I lose info with port number & mac address from received frames when learning fifo is full?
3) Are there any examples or demos of STP or maybe RSTP available for internal switch? linux, mqx, baremetal or whatever. maybe for others freescale controllers?
Thanks, Vitaly.
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I'm sorry, unfortunately I'm not aware of such an example.
Regards
Rene
Hello Vitaly,
We are not aware of any Vybrid specific STP/RSTP demos in Linux; perhaps there is something in MQX or baremetal, but from our stand point, we have nothing to point to. Unfortunately, we do not have a primer for STP/RSTP to pass along; should anything need changed within the Vybrid switch's firmware, I think Freescale may have to address that - if/when you get to that point, as I do not believe the configuration registers are accessible from userspace.
karinavalencia - perhaps Freescale has a networking resource that is more appropriate from a getting started stand-point?
Regards,
Timesys Support
rendy can you comment here?
I'm sorry, unfortunately I'm not aware of such an example.
Regards
Rene
timesyssupport can you help here?