Dear Sir
I would like to ask about the initialization sequence of Vybrid.
Customer is executing with the following steps.
1.Clock initializaion;
2.UART initialization;
3.LPDDR iomux initialization;
4.LPDDR initialization (LPDDR controller and RAM).
Q1.
Is there a problem with the above order?
Best Regards,
Eishi SHIBUSAWA
Dear NXP support member
Please reply this question.
Best Regards,
Eishi SHIBUSAWA
Hello,
Your initialization sequence is correct, but all initialization codes
should be located in and executed from internal memory OCRAM.
Because of ECC the entire OCRAM memory should be first
written during system startup.
Have a great day,
Yuri
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------