From the manual, it states that the mentioned ADC's are dedicated pads, so we assume they don't conflict with other functionality (e.g. alternate functionality for pins).
We've tried adding a second adc in the mach-mvf/board-twr-vf700.c file:
static void __init mvf_init_adc(void)
{
mvf_add_adc(0);
+ mvf_add_adc(1);
}
Additions to the mach-mvf/clock.c file:
static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "mvf-uart.2", uart_clk[0]),
_REGISTER_CLOCK(NULL, "mvf-uart.3", uart_clk[0]),
_REGISTER_CLOCK("mvf-dspi.0", NULL, dspi_clk[0]),
_REGISTER_CLOCK("pit", NULL, pit_clk),
_REGISTER_CLOCK("fec.0", NULL, enet_clk[0]),
_REGISTER_CLOCK("fec.1", NULL, enet_clk[1]),
_REGISTER_CLOCK("mvf-adc.0", NULL, adc_clk[0]),
+ _REGISTER_CLOCK("mvf-adc.1", NULL, adc_clk[1]),
..
static struct clk adc_clk[] = {
{
__INIT_CLK_DEBUG(adc_clk)
.id = 0,
.parent = &ipg_clk,
.enable_reg = MXC_CCM_CCGR1,
.enable_shift = MXC_CCM_CCGRx_CG11_OFFSET,
.enable = _clk_enable,
.disable = _clk_disable,
},
+ {
+ __INIT_CLK_DEBUG(adc_clk)
+ .id = 1,
+ .parent = &ipg_clk,
+ .enable_reg = MXC_CCM_CCGR7,
+ .enable_shift = MXC_CCM_CCGRx_CG11_OFFSET,
+ .enable = _clk_enable,
+ .disable = _clk_disable,
+ },
};