But today I am seeing the continuous prints on LX2160ARDB console which was left on that day idle. Any idea of how to avoid using these EDAC error checking etc ?
What is causing these prints and how to fix it ?
Although changed DDR modules , started coming after a day.
[346500.955209] EDAC MC0: 1 CE fsl_mc_err on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x87966 offset:0x140 grain:8 syndrome:0x2b)
[346501.275141] EDAC FSL_DDR MC0: Err Detect Register: 0x80000004
[346501.275149] EDAC FSL_DDR MC0: Faulty Data bit: 28
[346501.275150] EDAC FSL_DDR MC0: Captured Data / ECC: 0x00000000_10000000 / 0x00
[346501.275153] EDAC FSL_DDR MC0: Err addr: 0x8634bbe0
[346501.275154] EDAC FSL_DDR MC0: PFN: 0x0008634b
[346501.275157] EDAC MC0: 1 CE fsl_mc_err on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x8634b offset:0xbe0 grain:8 syndrome:0x0)
[346501.461870] EDAC FSL_DDR MC0: Err Detect Register: 0x00000004
[346501.461878] EDAC FSL_DDR MC0: Faulty Data bit: 28
[346501.461880] EDAC FSL_DDR MC0: Captured Data / ECC: 0x00000000_10000000 / 0x00
[346501.461882] EDAC FSL_DDR MC0: Err addr: 0x3e0bf2ac0
[346501.461884] EDAC FSL_DDR MC0: PFN: 0x003e0bf2
[346501.461886] EDAC MC0: 1 CE fsl_mc_err on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x3e0bf2 offset:0xac0 grain:8 syndrome:0x0)
[346501.627135] EDAC FSL_DDR MC0: Err Detect Register: 0x80000004
[346501.627144] EDAC FSL_DDR MC0: Faulty Data bit: 28
[346501.627145] EDAC FSL_DDR MC0: Captured Data / ECC: 0x00000004_10000003 / 0x37
[346501.627147] EDAC FSL_DDR MC0: Err addr: 0x85eb1100
[346501.627149] EDAC FSL_DDR MC0: PFN: 0x00085eb1
[346501.627152] EDAC MC0: 1 CE fsl_mc_err on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x85eb1 offset:0x100 grain:8 syndrome:0x37)
[346502.461892] EDAC FSL_DDR MC0: Err Detect Register: 0x00000004
[346502.461900] EDAC FSL_DDR MC0: Faulty Data bit: 28
[346502.461902] EDAC FSL_DDR MC0: Captured Data / ECC: 0x00000000_10000000 / 0x00
[346502.461904] EDAC FSL_DDR MC0: Err addr: 0x3e0bf2ac0
[346502.461906] EDAC FSL_DDR MC0: PFN: 0x003e0bf2
[346502.461908] EDAC MC0: 1 CE fsl_mc_err on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x3e0bf2 offset:0x