T1024 in memory down configuration

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

T1024 in memory down configuration

984件の閲覧回数
gauravverma
Contributor II

In my hardware design, i want to have ddr3 in memory down configuration ( ddr3 chips mounted on pcb) not in dimm configuration. From where can i get hardware guidelines for this configuration for T1024 processor. 

ラベル(3)
タグ(2)
0 件の賞賛
返信
1 返信

791件の閲覧回数
r8070z
NXP Employee
NXP Employee


Have a great day,

There 2 application notes on the nxp site which can help you - AN3940 “Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces”
https://www.nxp.com/webapp/Download?colCode=AN3940
and AN4039 “PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations”.
http://www.nxp.com/assets/documents/data/en/application-notes/AN4039.pdf

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信