Need timing impact in setting and clearing of below bits by hardware. Will there be any variation in the timing with respect to environmental factor (temperature or electromagnetic effect).
1. After setting the L2IO and L2DO bits in L2CSR0, T1024 reference manual recommend the software to read these bits till it is set. The time taken to wait for setting L2IO and L2DO is consistent for hardware, or it will be changing with variation of environmental factor (temperature or electromagnetic effect) or any other factors?
2. After Setting L2FL bit to flush the cache, T1024 reference manual tells that bit will be cleared by hardware once the flush operation is done. The time taken to clear this bit by the hardware for fixed cache size will it be consistent or different at varying temperatures and environmental conditions?
3. After Setting L2FI bit to invalidate the cache, T1024 reference manual tells that bit will be cleared by hardware once the invalidate operation is done. The time taken to clear this bit by the hardware for fixed cache size will it be consistent or different at varying temperatures and environmental conditions
4. Setting the L2E bit in L2CSR0 and waiting for this bit to be set by hardware. The time taken to wait for setting L2E is consistent for hardware or it will be changing with variation of environmental factor (temperature or electromagnetic effect) or any other factors?
The Above information will be useful to understand deterministic and consistent hardware behavior for a considered Software.
If the time is varying, is there any factor how much it varies?
