Hello,
I am trying to start core 1 from core 0 after I have initialized all peripherals in my T2080 board. I first configure the boot space translation registers to translate the boot addressees, then I am setting the DCFG_CCSR_BRR bit 1 to 1 to enable the core, and ensuring that bit 1 in the DCFG_CCSR_COREDISR is 0 and none of my code is being executed. However, when I debug the two cores by connecting the TAP to the board and stepping through the ROM code on the board I do get output from core 1. It seems that even though I am enabling core 1 via the DCFG_CCSR_BRR bit it still isn't executing.
