Maintaining persistent data through a reset using T1042

[kurtehrhardt]

Hello,

Is there a method to maintain data through a reset (non-power on) using the e5500's internal registers or T1042's peripherals?  We are aware of configuring DDR for self-refresh mode for this.  Can the CPC be configured as SRAM and used to store data that persists through a non-power on reset?  Can the SPRG* registers be used?  Are there any other solutions?  In other NXP processors (MPC5566), the SPRG* registers were unchanged during a reset, but undefined during a power on condition.

[alexander_yakov]

Yes, the CPC ram configured as SRAM may retain data after non-power on reset, however our design team said they can not confirm this is done intentionally, this functionality is not tested and can not be guarantied by NXP. The same is applicable to SPRGs.

The recommended way to retain data is to use external memory, for example DDR is self-refresh mode, or some nonvolatile memory.

Have a great day,
Alexander
TIC

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