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Because the IFC does not provides byte select signals it is better to use the NVRAM in the 8-bit configuration. So you can connect NVRAM address and data to IFC_AD[], IFC_ADDR[] and IFC_ALE of the T1040 as shown on Figure 24-65. “IFC to 8-bit NOR device interface” in the manual. Of course you should latch only IFC_AD[15:13] for the NVRAM A[16:18]. IFC_AD[0:7] are connected to the NVRAM D[7:0]. IFC WE and OE are connected to the NVRAM OE and WE. The NVRAM BHE and BLE should be pulled down (f.e. by pull down resistor). The NVRAM HSB may be connected to any free GPIO pin of the T1040. So the software can at least check busy status of the NVSRAM. I think even NOR machine can be used to control the NVRAM or GPCM in the normal internal counter-based program operation.
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