Hello Tania,
The external frequency of 26 MHz is needed in order to provide the carrier frequency as well as the data rate clock needed for the data rates associated with the OOK or FSK modulation.
The external crystal is connected to the X0 and XI pins. These pins are used by the internal PLL for creating the carrier frequencies and data rates for the RF pin.
In the other hand, the device counts with different internal oscillators:
— MCU bus clock of 0.5, 1, 2 and 4 MHz (1, 2, 4 and 8 MHz HFO)
— Low frequency, low power time clock (LFO) with 1 ms period
— Medium frequency, controller clock (MFO) of 8 usec period
Please note that the bus clock frequency is always the HFO frequency divided by two. In case you need to generate a bus clock of 4 MHz, please take a look at the BUSCLKS bits from the System Operation Register 2 (SIMOPT2).
In order to get more information about the clock distribution, I recommend referring to the Figure 2. FXTH871xD Clock Distribution from the datasheet.
Please find the datasheet mentioned at the following link:
https://www.freescale.com/webapp/sps/download/preDownload.jsp?render=true
I hope this information will be useful for you.
If I misunderstood your question, feel free to let me know. I will be glad to help.
Have a great day.
David Diaz.
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