MPXY8300 LF receiver generates false interrupts

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MPXY8300 LF receiver generates false interrupts

Contributor I

Hi all,

I am dealing with MPXY8300 TPMS all in one chip ... I must say that it's documentation is not of the best quality as well as this is my third question in a row about this chip I couldn't get any single answer. So I really hope that in this section about sensors there will be somebody able to help me.

What I am about to make is to use LF 125KHz receiver for waking up my TPMS sensor. To be more precise I want to use Manchester mode. The code is veru simple as you can se down:

void main(void)


  /* This code continously transmit TPMS packets of type VDO S1802020K */


  UINT8 i;

  volatile UINT8 tmp;

  volatile UINT8 RFRD_data[11];

  PTADD |= BIT3;  // set pin A3 output


  /* Set up MCU and set STOP mode. */






  LFCR = 0x84;

  LFCS1 = 0x40;

  LFCA1 = 0x61;

  LFCA0 = 0x5E;

  LFCS0 = 0x53;

  LFCS0 |= BIT3;



} /* main */

Here is interrupt routine:


interrupt VectorNumber_Vlfrcvr void lfrcvr_isr(void)


if (LFCS1 & BIT2){   // wake up code A received



} else {

  if ((LFCS1 & BIT7) && !(LFCS1 & BIT1)){







_asm BSET 6, 0x2F

_asm BSET 4, 0x2F

LFCS1 |= BIT6; // clear IF

//_asm cli;



As you can see, in the main function the program only loops infinitely. What happens is following. I am applying a 125KHz wake up signal from a commercial device. It starts with preamble, followed by synchronization followed by wake up code. After the reception of the wake up code, processor goes into interrupt service routine and the following flags from LFCS1 are set: LFDF, LFAF and MDDO.

First what I don't undestand is how is possible that other flags except LFAF are set. LFAF tells that wake up codes sent by the triggering device is the same as expected in the chip. Why LFDF flag is set, and why LFDATA regster contains 0x30. Why MDDO is set, which indicates that received Manchester data was not valid. I expect those flags are not set before correct reception of wake-up sequence.

What happens nect is following: Although I set LFDFAK flag (twice in this case) MDDO stays always one, so not cleared, which probably generates new interrupts. Finally the only thing my processor is doing is servicing ISR.

In the documentation, datasheet page 96, it is written:

"The LFR interrupt will be cleared when MDDO bit is cleared. The MDDO is cleared when a '1' is written to LFDFAK bit or a '0' is written to LFEN."

I am writting 1 to LFDFAK and MDDO stays 1.

In other two modes, direct MCU and Carrier detection, the processor works correctly.

Thank you in advace for your suggestions,


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