Hi Tomas,
Many thanks for your reply, and offer of help. I attach the timing diagram for a single byte read of address 0x0D.
The four traces are :
CLK - the SPI clock, driven from the microcontroller.
DAT - the SPI data line, driven by the microcontroller or the accel.
CS - not used by the accel, but output by the microcontroller and used by the Rigol scope to decode the data.
IND - not used by the accel, but output by the microcontroller to bracket when the ACK signal is sent by the accel. and sampled by the microcontroller.
I have used the standard circuit as described in the data sheet. The DAT line is pulled up with a 1K resistor. The accel is buffered by 100nF caps on BYPASS and Vdd close to the chip (within 5cm trace length). Vdd is also buffered by a 1uF cap.
As you can see in Table 12 of the data sheet, there are some other registers with default value different from 0x00 such as the PL_BF_ZCOMP or P_L_THS_REG registers, so if you read 0x00 also from these registers, it will not be a problem with an incorrect ID in the WHO_AM_I register.
Thank you for this. I attempted a read of P_L_THS_REG and PL_BF_ZCOMP and they also returned 0x00.
When I WRITE 0x01 to address 0x2A (i.e. set ACTIVE to 1) then subsequent reads of any addresses change from 0x00 to 0xFF. Attempting to set ACTIVE to 0 does not revert this behaviour (a power cycle is required). This leads me to think that I must look harder at my code and the timing.
I continue.
Many thanks for your help thus far.
Regards,
Tony Barry