FXTH87 Datasheet Typo

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FXTH87 Datasheet Typo

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lucascooter
Contributor I

Page 38, Table 25.

External Reset Pin

This bit indicates reset was caused by an active-low level on the external reset pin if the device was in either the STOP1 or RUN modes. This bit is not set if the external reset pin is pulled low when the device is in the STOP1 mode.
0 Reset not caused by external reset pin
1 Reset came from external reset pin

Sentence One Says: Bit is set in Stop1 Mode.

Sentence Two Says: Bit is NOT set in Stop1 Mode.

Sentence two contradicts sentence one. 

Which is it? Both of these sentences cannot be true.

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Lucas,

No this is not a contradiction: this means the PIN bit will be set in STOP1 due to an active-low level on the external reset pin only if the external reset pin is pulled high. If the pin is pulled low then the PIN bit will not be set after an active-low level on the external pin in STOP1.

If you need more clarification, please let us know.

Best regards,

Tomas

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lucascooter
Contributor I

Hi, thanks for the reply. 

I don't see the word "high" written anywhere. Could you give me examples of scenarios where there bit is and is not set?

Scenario 1: MCU is in STOP1 mode, user presses reset button which pulls the reset pin low momentarily and wakes up the MCU. Is the bit set to 1 or is it not?

Thanks.

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