FXLS8471Q—SPI Communication Question

[liben]

Hello !

I'm having some trouble to configure the SPI communication between FXLS8471Q and MPC5675K.@

I'll need to confirm that the SPI Mode is waked up successfully by reading WHO_I_AM register(0x0D) , but I've got this stranger signal by reading the MISO pin with oscilloscope. I don't know what the meaning of this signal, and I want to ensure if the SPI mode had been waked up successfully. At the same time, I hope you can give me some advice to solve the problem.

Thanks!

Ben

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[TomasVaverka]

Hello Ben,

Could you please post here a complete screenshot illustrating the read of the WHO_AM_I register (0x0D)? I mean something like this:

It might be also useful to see your schematic.

And I would recommend you to take a closer look at my example project where I describe and illustrate the SPI transactions in details.

Best regards,

Tomas

[liben]

Hello Tomas,

Thanks for your reply, the previous question has been solved. But I encounter a new problem when I connect FXLS8471Q and FXAS21002C  on the same SPI. The detailed schematic is shown below. Now, the comunication between FXAS21002C and the master is normal. But the comunication between FXLS8471Q and the master is not normal, no matter the FXAS21002C on 3-wire or 4-wire mode. I guess that the MISO pin of FXAS21002C has effect on the MISO pin of FXLS8471Q. The datasheet of FXAS21002C describes that In 4-wire SPI mode the MISO pin is always placed in a high impedance state when CS_B is not asserted (logic high level) and when FXAS21002C is operated in 3-wire SPI mode - bysetting CTRL_REG0[SPIW] = 1 - the SA0/MISO pin is always placed in a high impedance (high-z) state. I want to know how much resistance of the high impedance is.

Best regards,

Ben