We’re currently integrating the FlexLLCE example provided for the S32E R52 core on GHS u-velOSity and have encountered a high-priority issue during execution:
The function Can_43_FLEXLLCE_SetControllerMode(Controller=0, Transition=CAN_CS_STARTED (1)) (see attached mainLLCE) does not return, as it gets stuck in a loop within Can_43_FLEXLLCE_Ipw_MainFunction_Mode, located in Can_43_FLEXLLCE_Ipw.c at line 1082, column 16 (refer to the attached Block_function_LLCE and CS_FLEXLLCE_example).
It appears that the selected controller never transitions to the CAN_STARTED state.
All prior initialization functions complete successfully and do not indicate any errors.
Please note that the LLCE firmware was compiled according to the provided instructions related to our (GHS) complier. However, we are not using your default startup code, we are instead using the startup.c file attached.
BLOCKING FUNCTION
blocking function
MAIN
main
STARTUP CODE
#include <S32Z2_MSCM.h>
int Sys_GetCoreID(void)
{
return (IP_MSCM->CPXNUM & MSCM_CPXNUM_CPN_MASK);
}
CALL STACK
0 Can_43_FLEXLLCE_Ipw_MainFunction_Mode(Can_pControllerConfig=0x3230be74, Can_pControllerState=0x3232363c) [demos/FlexLLCE_example_routing_S32Z2XX_R52/RTD/src/Can_43_FLEXLLCE_Ipw.c:1082,16]
1 Can_43_FLEXLLCE_Ipw_SetControllerToStartMode(Can_pControllerConfig=0x3230be74) [demos/FlexLLCE_example_routing_S32Z2XX_R52/RTD/src/Can_43_FLEXLLCE_Ipw.c:615,38]
2 Can_43_FLEXLLCE_SetControllerMode(Controller=0, Transition=CAN_CS_STARTED (1)) [demos/FlexLLCE_example_routing_S32Z2XX_R52/RTD/src/Can_43_FLEXLLCE.c:1164,32]
3 main(argc=1, argv=0x323a7dc0) [demos/FlexLLCE_example_routing_S32Z2XX_R52/src/main.c:138,10]
Hi @carmelom,
Thanks for your questions
Could you please verify that in your project -> properties -> Resource -> Linked Resources the name FLEXLLCE_BIN_DIR has the value of the directory where the binaries of the FLEXLLCE package are located?
Also, could you verify or share your clock configuration?
Hello @carlos_o
Thank you for your answer!
Regarding the firmware, we are porting the example on our toolchain and I created a gpj file to include the content of FLEXLLCE_BIN_DIR in the program. it includes both c files and firmware folders (we are using ghs folder).
Regarding the clock configuration I can share the files generated on s32ds. Could you suggest the right way to share them? Since there is the NXP copyright I don't believe I can share them here. However I left all the configurations as they were in the provided example
Thank you
Carmelo Maniscalco
Hi @carmelom,
Thanks for sharing the information.
If the clock config is as the example there is not needed to be shared, thank you.
Could you please provide which version of the FLEX LLCE are you using?
I tried to reproduce the issue with the 0.9.3 but I'm not having any issue.
Also, please provide which version of RTDs are you using?
Hello @carlos_o
FlexLLCE version 0.9.3 and RTD version 2.0.0
So maybe, as I already wrote the issue is related to the startup code? since we are using a different one. Maybe we are not correctly initializing the system. Do you have a startup code that can be built with GHS compiler?Please consider that is you have that, we could solve others issue we have on other examples
Thank
Carmelo
Hi @carmelom,
I review the startup code that is given with the example, it has llce CRAM and DRAM initialization. The startup code the examples has is standard C and assembly. Could you try to use this code with the GHS compiler?
Hello @carlos_o
I took the startup code provided in the folder C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32ZE\RTD\Platform_TS_T31D53M20I0R0 that contains files already written for ghs compiler and I modify our ld file to have both sections for u-velOSity and RTD drivers. The result is that the program is stuck as before.
How I can check CRAM and DRAM initializations are correctly done?
Thank You
Carmelo Maniscalco
Hi @carmelom
The FlexLLCE example have their own startup code at C:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32ZE\FLEXLLCE\Can_43_FLEXLLCE_TS_T31D53M9I3R0\examples\S32DS\FlexLLCE_example_routing_S32Z2XX_R52\Project_Settings\Startup_Code this route is the default path.
In the core.c file the CRAM and DRAM for FlexLLCE are initialized in the function Core_MPU_Init at the loop with the rbar and rlbar variables
There is the write_PRBAR (assembly function) initialize it.
Hello @carlos_o
Integrating the startup code provided with the example the issue is still there.
Any other idea or code portion to debug to understand why the example is not working?
Thank you
Carmelo