why the two pictures's description is different?
for this pictrue whether it means S32k11x is not allowed to disable ECC function and ECC is enabled by default？ and I also hope to know ‘CF0’ is belong MCM_LMDR0 or MCM_LMDR1? wish your help , thank you !!
anther question as flowing
according to the above two picture, I check the data for offset 400 - 408, But this result is different with The following picture Table 10-1, Please help me or tell me where my understanding is wrong？
Hello,
These are the S32K148 reset values, it is just en example:
LMDR0: SRAM_L
LMDR1: SRAM_U
Therefore, LMDR0[CF0] is reserved.
From S32K1xx_Memory_Map.xlsx:
Regards,
Daniel
