Hello NXP team,
We are using S32K148 controller in our project.
running the controller in normal run mode .
I have just followed the power management example code and same thing is implemented in our project.
I have few doubts
1. changing state from the RUN to VLPS mode (called the POWER_SYS_Init(&powerConfigsArr, POWER_MODES, &powerStaticCallbacksConfigsArr, 0); and retV = POWER_SYS_SetMode(VLPS, POWER_MANAGER_POLICY_AGREEMENT);)
Before going to VLPS mode , is anything to take care (deinit or init of Peripherals, Clock , NVIC etc)?
2. How much is the current reduction if change the state from RUN to VLPS mode?
3. how to come back from VLPS to normal RUN mode ?
can I use the retV = POWER_SYS_SetMode(RUN , POWER_MANAGER_POLICY_AGREEMENT);
how to check the different modes(RUN , HSRUN , VLPS mode) conversion ?
RUN to VLPS - how to check?
VLPS to RUN -how to check?
changing the mode from VLPS to RUN mode, need to reinitialize all the peripherals?
please kindly help me to understand the above queries and share me any code or document relevant to power management.
Thank you in advance.
please see below comments.
1. Table 38-4 RM, rev.9 specifies which modules can be used in VLPS.
All the modules that are specified as OFF, should be disabled prior to the VLPS mode transition.
Since these clock source FIRC, SOSC, SPLL must be disabled, disable first the peripherals that are using the clock source first, switch the system clock to SIRC and disabled all the other clock sources.
NVIC gets disabled automatically, AWIC is used instead.
2. Please refer to the S32K1xx datasheet, rev.9, section 4.7 Power consumption.
3. The primary function of the Asynchronous Wake-up Interrupt Controller (AWIC) is to detect asynchronous wake-up events in stop modes and then signal to clock control logic to resume system clocking. After clock restart, the NVIC observes the pending interrupt and performs the normal interrupt or event processing.
Wakeup sources are listed in Table 7-8, RM.
Since the core is halted in stop modes, you can measure the power consumption at VDD power supply or bus clock at CLKOUT.
There are flags that get set should the transitions to the stop mode failed, for example VLPSA.
They can be read after the WFI instruction.
Yes, the clock sources and peripherals need to be reinitialized.
Please refer to: AN5425, Power Management for S32K14x
There are examples that work in VLPS in this list.
S32K1xx document & example list
In the first step you mention that it is necessary to switch the system clock to SIRC. I was wondering if this is actually the case if it is desired to go from RUN to VLPS directly and not through VLPR. This is confusing as the RM does state that when entering VLPR/VLPS the system clock should be SIRC but, is this a must for VLPS?
Also, is it correct to assume that the VLPS will handle itself the disabling of SPLL, FIRC, and SOSC generation? In this case, is it enough just to disable the modules by software before requesting the transition from RUN to VLPS?
Yes, it is the case when the MCU goes from RUN to VLPS directly.
The system clock should be SIRC.
The SOSC, SPLL, FIRC should be disables by SW.