VRC_CTRL Clarification

[kumamon]

Hello NXP Support,

I would like to ask some questions on S32K3's VRC_CTRL (PTE13).

(1) RM mentions VRC_CTRL is direct signal, could you please check the understanding/question in the following table (red font)?

ALTx	OBE	IBE	VRC_CTRL	Question
GPIO	Disabled	Disabled	Enabled	VRC_CTRL will take effect, right?
GPIO	Disabled	Enabled	Enabled	VRC_CTRL will still take effect, right?
GPIO	Enabled	Not Care	Enabled	Who will take effect?

(2) If we configure PTE13 as GPIO + OBE Enabled + Output Level Low, will the VRC_CTRL negative feedback mechanism be broken because VRC_CTRL is treated as error signal and now maybe GPIO and VRC_CTRL are driving the pin at the same time?

(3) In NXP MCAL, as long as I configure PTE13 as PG_VRC_CTRL_OUT, OBE will be automatically set by function Port_Ipw_SetOnlyOutputMode(), is it an issue of MCAL?

(4) How to test VRC_CTRL feedback mechanism , what waveform is expected during which condition?

(5) Why is MSCR141 documented as "Not Supported" in RM?

Thanks.

BR

[PavelL]

Hello @kumamon ,

I think the main misunderstanding is that VRC_CTRL is being treated as a regular SIUL2/GPIO output.

VRC_CTRL is a direct output of the PMC last-mile regulator. When the external ballast-transistor supply option is used, the PMC monitors the V15 domain and adjusts VRC_CTRL, which is connected to the base of the external NPN transistor. This forms a closed analog feedback loop. Therefore, VRC_CTRL is not controlled through the normal GPIO output data registers.

For this reason, the GPIO ALTx, IBE and OBE combinations in the table are not applicable to the VRC_CTRL function:

1. IBE only controls the digital input buffer and has no role in the V15 regulator feedback loop.

2. VRC_CTRL should not be configured or forced as a GPIO output while it is used by the last-mile regulator. In particular, setting a GPIO output level to Low is not the correct way to disable or control the regulator.

3. The last-mile regulator is controlled by the PMC, including the PMC_CONFIG[LMBCTLEN] field and the initialization sequence documented in the device-specific PMC chapter.

4. VRC_CTRL is an analog control signal rather than a digital status output. Consequently, there is no single fixed waveform that applies to all designs. Its voltage depends on the external transistor, V15 load, supply voltage, external capacitance and operating mode. For validation, V15 and VRC_CTRL should be measured together during startup and under load changes. The expected result is that V15 remains within its specified operating range while VRC_CTRL adjusts the external transistor as required.

5. MSCR141 is documented as “Not Supported” because PTE13/VRC_CTRL uses a direct connection from the PMC rather than the normal SIUL2 output-multiplexing path. Therefore, MSCR141 must not be used to control the VRC_CTRL function.

Regarding Port_Ipw_SetOnlyOutputMode(), the fact that this function is called does not by itself prove that the PMC regulator is affected.

Please also note that the reset behavior is derivative-specific. For example, the S32K3x8 (and S32K356) PMC has a device-specific CONFIG reset value of 0x00000083, so the last-mile regulator configuration is enabled after reset. This must not be generalized from older S32K3 derivatives where LMBCTLEN may need to be enabled explicitly.

Best regards,

Pavel