Use S32K144 I/D Cache?

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Use S32K144 I/D Cache?

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paul_xu
Contributor II

Hi ,

      The S32K-RM_rev4.pdf contains an introduction to the caches  "The device includes one 4KB code cache  to minimize the performance impact of memory access latencies". I could not know how to use it in my project. And it seems that the example generated by S32DS for ARM V1.3 SDK does not include the cache initialization section. If there is a application note about cache use or a example?S32K‌ 

      best regards!

      Paul Xu

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi

Unfortunately, there is neither an application note nor an example for S32K.

You can refer to Optimizing Performance on Kinetis K-series MCUs.

Unlike the Kinetis K-series, the S32Kxx has only two cache regions R0, R2.

See S32Kxx_Memory_Map.xlsx.

Regards,

Daniel

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