Triggering DMA via Peripheral hardware request (eMios OPWMT)

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Triggering DMA via Peripheral hardware request (eMios OPWMT)

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abemat
Contributor III

How can I configure the PWM flag event response to trigger a specified DMA channel? Up to now, I have configured two parts of the configuration, first DMA and after PWM.

DMA

DMA configured to write from location A to B, working when triggered with a Software Request.

Now, I have configured the request to:

config_dma.PNG

The eMios choices for the DMAMUX Source are: EMIOS0_0, EMIOS0_1, EMIOS0_9, EMIOS0_10. That matches with the DMAMUX options:

dmamux0_overview.PNG

eMIOS

PWM is configured in OPWMT, where the trigger channel is after the trailing edge of the PWM. Additionally the Flag Event response is EMIOS_PWM_IP_DMA_REQUEST. (note that in the screenshot I am using eMios1 - this should be the same as the eMios instance configured in the DMA settings)

abemat_0-1647293790239.png

Now the part where I get confused: how can I attach the DMA request of eMios0 channel 2 to any of the four given options of DMAMUX listed above?

Attached is the project.

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6,097件の閲覧回数
abemat
Contributor III

Hi Petr,

Thanks for your reply. Sadly, I can not get it to work. I've roughly used the same configuration, I am now using Emios1 channel 1, and I removed the DMAMUX trigger flag, as that is used for periodic trigger generation. However, the eMIOS OPWMT trigger still does not trigger any DMA requests.

To debug, I have taken a look what the generated code creates for the DMAMUX CHCFG3 register. For the used DMA channel (Ch3) the register is set to 0x91, which translates to ENBL: DMA channel is enabled (1U<<7U) + SOURCE: DMA Channel Source (17U<<0U). 17U is the DMAMUX source as read from the DMAMUX_map. This is as expected.

abemat_0-1647625549792.png

Would you care to help me troubleshoot my issues? I have attached my setup and screenshots of the configuration for easier debugging.

P.S. I also have an issue with repeated Scatter/Gather DMA requests. The first DMA_IP_CH_SET_SOFTWARE_REQUEST works splendidly, but subsequent SW requests do not set new values for both Scatter/Gather elements without running Dma_Ip_SetLogicChannelScatterGatherConfig(...). Without it, only the last SG element is renewed. Would you happen to have an idea what is causing this?

 

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6,117件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the configuration you have should be correct. Within eMIOS setting you need to enable DMA request by setting Flag Event response and within DMA channel config then select eMIOS request for given DMAMUX.
However not all eMIOS channel's flag acts as DMA request source. There are only 8 sources for eMIOS instance, and those are from below channels 
EMIOSn_0, EMIOSn_1, EMIOSn_9, EMIOSn_10, EMIOSn_16, EMIOSn_17, EMIOSn_18, EMIOSn_19 

BR, Petr

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6,053件の閲覧回数
abemat
Contributor III

Hi Petr,

This is a follow-up from my side. Sadly, I still do not have the trigger working. To see if the flag is correctly generated I have also tried to obtain an interrupt directly from the eMIOS channel as well, but that also does not work for me.

First, I have confirmed that the eMIOS in OPWMT mode generates a flag: IP_EMIOS_1->CH.UC[1].S = 0x80000001. The leftmost bit is the OVR Overrun bit and the rightmost bit is the FLAG bit, which signifies that there have been flag generations. 

Then I have tried installing the interrupt handler for eMIOS1_1 with: 

IntCtrl_Ip_InstallHandler(EMIOS1_5_IRQn, EMIOS1_5_IRQ, NULL_PTR);
IntCtrl_Ip_EnableIrq(EMIOS1_5_IRQn);

and configured an interrupt handler similar to the example in Dma_Ip_DmaTransfer_S32K344: the callback function is provided in the ConfigTool. I am using eMIOS1_5 since that interrupt handler groups eMIOS1_0-3 (see S32K3xx_interrupt_map.xlsx)

Let me know if there are any configuration issues.

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6,026件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

when testing your code I got hardfault for DMA init. Seems clocks are not enabled, or similar, so not sure for a real behavior.
Setting looks fine, but to get DMA channel interrupt you need to also enable it within TDC setting, seem it is not set there.

BR, Petr

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6,021件の閲覧回数
abemat
Contributor III

Hi Petr,

Thanks for the follow-up. Weird that you get a hardfault for DMA init - I will look into this, as I do not experience the same. What do you mean with the TDC setting? In the Reference Manual TDC is only mentioned in the FlexCan chapter.

Should the TDC setting have effect on the eMIOS FEN flag? Setting this manually looks like it could be our missing piece - I will come back to see if it works completely.

Thanks,

Abel

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6,018件の閲覧回数
abemat
Contributor III

Here is the follow-up as promised. 

Enabling the DMA request

It seems like setting the Emios Flag Event Response in the ConfigTool for Emios_Pwm is not enough to enable the flag event response. The eMIOS channel as configured in the ConfigTool is configured with Emios_Pwm_Ip_InitChannel. The relevant function calls are given below:

Emios_Pwm_Ip_InitChannel -> Emios_Pwm_Ip_InitOutputIrqAndMode -> Emios_Pwm_Ip_SetDMARequest. This call sets the DMA bit of the UC Control n register, but does not set the FEN bit of the same register. Without the FEN bit, no interrupt requests or DMA requests are generated.

It seems like a bug to me that after the configuration of the ConfigTool setup where I requested the Flag Event response to be EMIOS_PWM_IP_DMA_REQUEST that the DMA requests are not generated.

I found that the function I expected to be called in the initialization is Emios_Pwm_Ip_SetFlagRequest, which does set the FEN bit depending on the configuration in the ConfigTool. I would classify this missing function call in Emios_Pwm_Ip_InitChannel as a bug, since it does not follow the configuration as the user specified.

So, how do I report this bug to NXP directly?

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6,007件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

sorry to misleading you, it was a typo, I meant TCD, DMA Transfer control descriptor.

You are right that both FEN and DMA bits of eMIOS channel control register need to be set to generate DMA request. So if you will have below calling it will work properly?
Emios_Pwm_Ip_InitChannel(EMIOS_PWM_IP_BOARD_InitPeripherals_I1_CH1_CFG, &Emios_Pwm_Ip_BOARD_InitPeripherals_I1_Ch1);
Emios_Pwm_Ip_SetFlagRequest(EMIOS_PWM_IP_BOARD_InitPeripherals_I1_CH1_CFG, Emios_Pwm_Ip_BOARD_InitPeripherals_I1_Ch1.ChannelId, Emios_Pwm_Ip_BOARD_InitPeripherals_I1_Ch1.IrqMode );

Not sure how driver was drafted, but seems to be reasonable to have all set properly in Init function.

If you want to report this, just create new Case so can be assigned to relevant team 
https://community.nxp.com/t5/HomeTest-Knowledge-Base/How-to-submit-a-new-question-for-NXP-Support/ta...

BR, Petr