I have been using debug mode to adapt to the secure boot, and the secure boot has been working well, but after downloading through j-flash mode, I found that the device does not start normally,I found that it is caused by BOOT SEQ ENABLE in BCW.
The device cannot be booted after BOOT_SEQ_ENABLE is set and the device powercycle, But debugging with the S32DS can be started.
If I changed BCW(Boot configuration word) like this,it can be booted after device powercycle:
.long (CM7_0_ENABLE << CM7_0_ENABLE_SHIFT) | (CM7_1_ENABLE << CM7_1_ENABLE_SHIFT) | (BOOT_SEQ_ENABLE << BOOT_SEQ_SHIFT) /* Boot configuration word */
>>
.long (CM7_0_ENABLE << CM7_0_ENABLE_SHIFT) | (CM7_1_ENABLE << CM7_1_ENABLE_SHIFT) /* Boot configuration word */
The full startup cm7.s file is listed below:
#ifndef BOOT_SEQ_ENABLE
#define BOOT_SEQ_ENABLE (1)
#endif
#ifndef BOOT_SEQ_SHIFT
#define BOOT_SEQ_SHIFT (3)
#endif
.section ".boot_header","ax"
.long SBAF_BOOT_MARKER /* IVT marker */
#.long (CM7_0_ENABLE << CM7_0_ENABLE_SHIFT) | (CM7_1_ENABLE << CM7_1_ENABLE_SHIFT) /* Boot configuration word */
.long (CM7_0_ENABLE << CM7_0_ENABLE_SHIFT) | (CM7_1_ENABLE << CM7_1_ENABLE_SHIFT) | (BOOT_SEQ_ENABLE << BOOT_SEQ_SHIFT) /* Boot configuration word */
.long 0 /* Reserved */
.long CM7_0_VTOR_ADDR /* CM7_0 Start address */
.long 0 /* Reserved */
.long CM7_1_VTOR_ADDR /* CM7_1 Start address */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long XRDC_CONFIG_ADDR /* XRDC configuration pointer */
.long LF_CONFIG_ADDR /* Lifecycle configuration pointer */
.long 0 /* Reserved */