The SPI data is disconnected

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

The SPI data is disconnected

578 次查看
Jackson_Ping
Contributor II

Hi,all,

    I had a problem recently,The S32K324 SPI2 clock frequency 10MHz uses DMA to send how the interval between bytes is eliminated.One is the register configuration and the other is the timingiwEcAqNwbmcDAQTRA3UF0QGvBrC3lRJKGI5SVAV-io5SSEkAB9IIsKZwCAAJomltCgAL0gAAiPA.png_720x720q90.jpgiwEcAqNwbmcDAQTRBboF0QIYBrB0DGomrasoVwV-ioO8rMEAB9IIsKZwCAAJomltCgAL0gAA1D0.png_720x720q90.jpg

0 项奖励
回复
2 回复数

547 次查看
PetrS
NXP TechSupport
NXP TechSupport

Hi,

SPI timing parameters are discussed in chapter 71.3.1.3 of the device RM. So you can refer to it and compare setting with your real signal. It would be great to add generated CS signal as well, to know full frame and a code used to send displayed frame. Could be also a delay is cause by SW overhead.  

BR, Petr

0 项奖励
回复

514 次查看
Jackson_Ping
Contributor II

Hi,Petr,

 

Thank you for your answer, I will take some time to study it, thank you.

 

 Best regards,

  Jackson

0 项奖励
回复