TRGMUX Configuration Issue: LCU0_OUT0 Not Routed to eMIOS_0_CH_7_G

[GaneshBhagwat]

Hi,

The LCU output is correctly observable on its direct physical pin. However, when routing this signal via TRGMUX to an eMIOS channel (and then to the corresponding eMIOS output pin), the signal does not appear on the eMIOS physical pin.

Currently, my LCU output is working correctly on LCU0_OUT0, which is mapped to pin [F17] PTD3. However, I would like to route the same output signal to another pin, specifically eMIOS_0_CH_7_G on [R3] PTE9.

I have configured TRGMUX for this purpose, but the signal is not appearing on the target pin. I referred to the following discussion, which seems to describe a similar setup (please confirm if this is the correct approach):
https://community.nxp.com/t5/S32K/Routing-signals-to-emios-from-trgmux-using-s32-Design-Studio/m-p/1...

I have also attached a ZIP file of my project for reference. Could you please review it and help identify why the routing is not functioning as expected?

Additionally, I noticed that routing works when using LCU outputs directly, but I encounter issues when trying other routing paths. Any insights on this would also be helpful.

Could you please help me resolve this issue?

Thanks and regards,
Ganesh Bhagwat

[Robin_Shen]

Hi Ganesh,

Below is the signal routing diagram that customer drew for me back then. Please confirm whether you also need to configure the signal direction as him.

Since I sent the modified example code directly to that customer, I forgot to upload a screenshot of the Trigger MUX configuration in my reply. The textual description in that reply might be confusing you, so I will post a screenshot of the modified Trigger MUX configuration for your understanding:

Please note that the eMIOS_0_CH_7_G signal is internally provided by TRGMUX_INT_OUT38 via the Input SSS selection of the IMCR567. See “S32K358_Input Muxing eMIOS_0_CH[7]_G SIUL_IMCR567 TRGMUX_INT_OUT38.png” shown below. eMIOS_0_CH_7_G is not selected to be input from a certain pin (PTE9\PTE7\PTB1).

Siul2_Port_Ip_SetInputBuffer(NULL, 0, FALSE, 567-512, PORT_INPUT_MUX_ALT4);//eMIOS0_CH7  IMCR567 to 0x4 (TRGMUX_INT_OUT38)

Best Regards,
Robin
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[GaneshBhagwat]

Hi @Robin_Shen

I tried the pin configuration you suggested, but it's still not working.

What is working:
- I can see the physical output on **LCU0_OUT0** (PTD pin) as expected.

What is not working:
- After routing LCU0_OUT0 through **TRGMUX** to **PTE9**, I cannot see any signal on PTE9 on the scope.
- I tested PTE9 configured both as input and as output, but still no signal appears.

My goal is to route the LCU0_OUT0 signal through TRGMUX to an eMIOS channel and then finally to a physical pin (PTE9).

I have not done any eMIOS configuration yet. Is eMIOS channel configuration required to properly route and output the signal from TRGMUX to the pin? Or should the TRGMUX routing work independently?

For my application, I need the LCU output to appear on PTE9 (or any eMIOS-connected pin).

I have attached the current pinout and TRGMUX settings for your reference.

Could you please help me understand what I might be missing?

Thank you for your support.

Ganesh Bhagwat

[Robin_Shen]

Thank you for your explanation. I understand the current situation:

The LCU OUTPUT (LCU0_OUT0~11) pins are implemented, and the Trigger Mux Output (TRGMUX_OUT0-7) pins are implemented.

You want to output the LCU OUTPUT to a specific pin using a method other than the two methods mentioned above. For example, you want to input LCU_n_lcm_out_i[1:4] to eMIOS_n_ipp_ind_emios_ch[ ] via TRGMUX, and then output it to the eMIOS pin using some other method.

I read section "63.5.3.6 UC modes" of the S32K3XXRM and did not find any mode that supports directly outputting signals from the input eMIOS pin.

Figure 238. PCMC connections diagram shows that the signals connected to the TRGMUX output to the eMIOS module are eMIOS_n_ipp_ind_emios_ch[ ] and eMIOS_0_1_2_emios_odis[0:3].

Please note that eMIOS_n_ipp_ind_emios_ch[ ], which I mentioned in a previous post, is actually the eMIOS input signal, usually input to modes such as SAIC, PEC, and IPWM.

Should we consider using eMIOS_0_1_2_emios_odis[0:3]? "63.1.4 eMIOS disabling": eMIOS can disable its output using its disable inputs. Disable inputs[3:0] are driven from the flag out bits[11:8].

For more details, please read "63.5.3.16.11 Output disable" in S32K3XXRM Rev12. My idea is to configure the PWM output to remain unchanged, i.e., full duty cycle PWM. Then, the LCU output is routed to eMIOS_0_1_2_emios_odis[0:3] via TRGMUX, which will directly disable the eMIOS output, making its output follow the LCU output.