TJA1101 WAKE UP function when working in master mode

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TJA1101 WAKE UP function when working in master mode

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zhaoning
Contributor II

Hi NXP experts,

We are now using TJA1101 in our controller and it works in master mode.

We would like to know if the PHY in master mode when entered into sleep mode can be waked by the PHY which works in slave mode.

Is it true that only the PHY operating in slave mode can be waked by the master PHY? Apart from local wake-up, is there any way for the PHY in master mode to be waked by the PHY working in slave mode?

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PavelL
NXP Employee
NXP Employee

Hi,

ad 1. Yes, PHY1 and PHy2 send Ethernet frames as a confirmation before going to sleep mode (refer to AN13236 chapter 5.8.1).

         Yes again, but only if register_18/SLEEP_CONFIRM=0 - no confirmation needed from another PHY before going to sleep.

ad 2. Yes, wake-up and sleep is unrelated to whether the PHY operates in master mode or slave mode.

          No, the sleep and wake-up functions are simply negotiated between the PHYs through the Ethernet. Also, the host processor can force PHY (by SMI bus) to sleep mode anytime.

Best regards,

Pavel

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PavelL
NXP Employee
NXP Employee

Hello zhaoning,

based on AN13236 - TJA1101B Automotive Ethernet PHY, Application Note, chapter 5.8.2, the link wake up procedure is not dependent on PHY mode.

Best regards,

Pavel

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zhaoning
Contributor II

zhaoning_0-1722421371459.png

Hi,

1. As a newcomer to automotive Ethernet, I would like to ask whether the LPS CODES between PHY1 and PHY2 in the above picture require both Ethernet nodes to send and receive Ethernet frames? Or is the sleep process initiated solely by any one side's MCU writing to the PHY(no matter working as master mode or slave mode) through the SMI bus, with the entire Ethernet entering the sleep state being fully negotiated by PHY1 and PHY2 through the MDI bus?

2. Another question, is wake-up and sleep unrelated to whether the PHY operates in master mode or slave mode? Furthermore, are the sleep and wake-up functions simply negotiated between the PHYs through the SMI bus, independent of Ethernet frames?

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