SIUL write pin time

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SIUL write pin time

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3,323 次查看
JCastro
Contributor II

Hello

I'm trying to measure my function time using a pin configured as SIUL output, but I realize that running a pin HIGH and LOW takes between 1.8us and 2.2us (measured using an oscilloscope). I'm using the function Siul2_Dio_Ip_WritePin defined in the RTD drivers. The MCU is the S32K311 running at 160MHz and SIUL peripheral at 30MHz. 

The datasheet specifies that the pin rising/falling time (hw) is between 1 and 18ns, so the rest of time must be in consumed by the RTD driver, checking the disassembly it doesn't seem that this function needs too much time. Am I missing something? Why does the MCU need ~2us to run a write pin command?

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Well, even if you do it in OPCODE you will need some load /store instructions executed.

So it will be like:

1. load data into core registers

2. load address of periphery

3.. store the data into periphery register

 

So you will need approximately 5 instructions with average of 5 cycles each.

so in final 5x5 = 25 cycles.

For exact calculations refer to the core programming manual where instruction cycles are explained.

 

But since you are using RTD drivers, you wont mix them with custom code, as you will have hard time doing so.

Simply there is too much overhead as people these days do not want to understand the device from low level and optimize the code. They want simple and fast way how to program their application and therefore it creates such overhead and require us to create more and more powerful devices to be able handle such overhead.

Best regards,

Peter

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3,255 次查看
petervlna
NXP TechSupport
NXP TechSupport

Hello,

Well, even if you do it in OPCODE you will need some load /store instructions executed.

So it will be like:

1. load data into core registers

2. load address of periphery

3.. store the data into periphery register

 

So you will need approximately 5 instructions with average of 5 cycles each.

so in final 5x5 = 25 cycles.

For exact calculations refer to the core programming manual where instruction cycles are explained.

 

But since you are using RTD drivers, you wont mix them with custom code, as you will have hard time doing so.

Simply there is too much overhead as people these days do not want to understand the device from low level and optimize the code. They want simple and fast way how to program their application and therefore it creates such overhead and require us to create more and more powerful devices to be able handle such overhead.

Best regards,

Peter

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3,240 次查看
JCastro
Contributor II

Ok, I removed the LOCK/UNLOCK section of the Siul2_Dio_Ip_WritePin function and now it takes 265ns.

 

As you said if each instruction takes 5 cycles and REGISTER SET section needs 10 instructions it must be 400ns, which more or less matches with the 265ns measured.

 

Thanks for the support!

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3,295 次查看
petervlna
NXP TechSupport
NXP TechSupport

Hello,

The datasheet specifies that the pin rising/falling time (hw) is between 1 and 18ns

This is the switch of pin level time when your SW ask for it and the micro deliver the signal to the port pin.

petervlna_0-1724909114892.png

 

Also it depends how do you measure the event. Fastest way is to simply which it via GPDO in debugger which will do the direct write to the register.

RTDs are not efficient, and if you are running the switch in interrupt or in some OS task is even worse.

I would say, that 2us is reasonable time, considering all that added SW and measurement delay.

Best regards,

Peter

3,278 次查看
JCastro
Contributor II

Assuming the following code:

while(1) {
Siul2_Dio_Ip_WritePin(DEBUG_1_PORT, DEBUG_1_PIN, 0);
Siul2_Dio_Ip_WritePin(DEBUG_1_PORT, DEBUG_1_PIN, 1);
}

Stepping into the Siul RTD drivers:

void Siul2_Dio_Ip_WritePin(... args ...) {
...
empty asserts
...

/* LOCK code */
SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01();
/* End LOCK code

/* REGISTER SET code
Siul2_Dio_Ip_PinsChannelType pinsValues = (Siul2_Dio_Ip_PinsChannelType)base->PGPDO;
pinsValues &= (Siul2_Dio_Ip_PinsChannelType)(~((Siul2_Dio_Ip_PinsChannelType)1U << (15U - pin)));
pinsValues |= (Siul2_Dio_Ip_PinsChannelType)(((Siul2_Dio_Ip_PinsChannelType)value & 1U) << (15U - pin));
base->PGPDO = pinsValues;
/* End REGISTER SET code

/* UNLOCK code */
SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01();
/* End UNLOCK code */
}

 

I split into 3 sections, LOCK + REGISTER SET + UNLOCK, if I list the operations done during REGISTER SET:

  • 1 x memory read
  • 2 x substractions
  • 2 x bit shift
  • 4 x logic operations
  • 1 x memory write

Using a Cortex M7 (S32K311) I assume one cycle per operation will take aprox 10 cycles, at 120MHz core clock == 83ns (correct me if I'm wrong).

 

So I assume that most of that 2us time I see comes from the LOCK/UNLOCK sections.

Can I remove theLOCK/UNLOCK sections from RTD assuming the code is as simple as shown above?

 

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