[S32k3] Multipartition with single core + lockstep Controller

[KrutarthRaut41]

I’m working on an AUTOSAR project with the S32K3x and need to split the 4 LPSPI modules into two independent partitions. Note that, ECU we are using is single core + lock step so we dont have 2 separate cores:

• Partition A: LPSPI1 & LPSPI2
• Partition B: LPSPI3 & LPSPI4

Each partition should run in synchronous mode without conflicts between the SPI driver and SCHM. I’m using EB Tresos for configuration and RTD 6.0.0 for the SPI driver.

I’m looking for guidance on:

1. What settings should I use in EB Tresos (SpiLevel, channels, jobs, sequences, SCHM exclusive areas)?
2. How should I map external devices and chip-select pins for each partition?
3. Any best practices for DMA, buffer allocation, and ensuring partition isolation?
4. If possible, could you share an example EB Tresos XML snippet or screenshots for this setup?

[VaneB]

Hi @KrutarthRaut41 

Could you please clarify a few points? You mentioned that your device is “single core + lockstep.” Do you mean it has only one lockstep core? Please also specify the exact S32K3 derivative you are using.

If you have a single core, both partitions will share the same CPU, so true parallel execution is not possible.

For a good starting point to understand the SPI driver for S32K3 devices, I recommend referring to the S32K3_S32M27x SPI Driver Integration Manual and the User Manual included with the RTDs. These documents provide detailed information about the driver, including its limitations, hardware and software requirements, usage instructions, and configuration guidelines. They will help you gain a deeper understanding of the driver’s functionality. You can find these resources at:

C:\NXP\SW32K3_S32M27x_RTD_R21-11_6.0.0\eclipse\plugins\Spi_TS_T40D34M60I0R0\doc

BR, VaneB