S32k148 - SAI FIFOs

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32k148 - SAI FIFOs

3,361 Views
jakub_mielczare
Contributor III

Hello,

I am using s32k148 chip. When reading the SAI Rx FIFOs, I am getting pointer values greater than 7.

The S32K Reference Manual specifies, that each receive channel has a FIFO of 8 units (each unit 32-bit size). The manual also specifies, that in SAI RFRn register WFP and RFP have 4-bit size, which is more than required to store 0-7 write/read pointer.

Are the FIFOs bigger than 8 units? Is it normal to observe Rx WFP values larger than 7?

Thank you,

Jakub

Labels (1)
Tags (1)
0 Kudos
Reply
12 Replies

3,017 Views
chintusai6
Contributor II

Hai jakub, 

could you please tell me which microphone have you used for SM32K148 ?? 

if possible could you share the details, how to configuration microphone ??

Thanks

saichand

S32k148 - SAI FIFOs

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hi Saichand,

I did not use a microphone. I soldered a wire to loopback SAI0_D0 (tx) to SAI0_D2 (rx).

Thanks,

Jakub

0 Kudos
Reply

3,017 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

You write that you are getting pointer value > 7. 

What exact values do you get?

You should get 0b1000 for sure since the FIFO size is 8.

Thanks,

Daniel

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hi Daniel,

I am getting values from 0 to 10 (did not check if higher as well).

Thanks,

Jakub

0 Kudos
Reply

3,017 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Jakub,

Sorry for the delay.

We have been trying to reproduce that without any success.

The FIFO pointers show values in the range 0-8 as expected.

Could you share a screenshot of the registers with the FIFO pointers?

Also, what SAI configuration do you use?

The more information, the better.

The SAI initialization code or a test project would be great.

Thanks,

Daniel

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hi Daniel,

Attached is the screenshot with FIFO pointer registers.

sai0_rx_fifo_pointers-ch2.png

I also attached my SAI0 initialization code.

Thanks,

Jakub

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Let me add that on my board SAI0_D0 output is wired to SAI0_D2 input.

0 Kudos
Reply

3,017 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Jakub,

Thanks for the additional information and sorry for the delay.

Unfortunately, the issue is still under discussion with design.

Also, we have still difficulties to reproduce the bahaviour for some reason.

If possible, could you share a working test code, the whole project?

You could send it via a ticket if you don't want to post it here.

Anyway, I will update this thread once we have confirmation from the IP designer.

Thanks,

Daniel

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hello Daniel,

I don't have a sample project which I could share. I only have my full application.

Would register dump from S32 Design Studio help? If yes, then I can post one, just let me know which registers you need.

Thanks,

Jakub

0 Kudos
Reply

3,017 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Jakub,

UPDATE,

I'm sorry for the delayed response and confusing information.

The FIFO pointers are circular. Although the FIFO size is 8 words, the pointers increment up to 0xF.
The number of words in the FIFO is then the relative difference between the WFP, RFP pointers.

pastedImage_1.png

Let say 5 words is written to the Receive FIFO by the HW, then, the RFRn_WFP pointer shows 0x5 while the RFRn_RFP pointer shows 0x0 until all the data are read (by DMA, for example) from the FIFO, then the RFRn_RFP is also 0x5.
And because at this point the pointers are identical, the FIFO is empty.
If other 5 words are received, the RFRn_WFP pointer increments to 0xA while the RFRn_RFP pointer stays at 0x5 until the data (5 words) are read from the FIFO, then the RFRn_RFP also increments to 0xA.
And because at this point the pointers are identical, the FIFO is empty again and a new transfer can be initialized.
This is a correction of my previous answer - the FIFO does not need to be reset. I’m sorry for that.

You can refer to the sai_transfer_s32k148 SDK example, this example utilizes DMA.
The FIFOs are reset during initialization in the SAI_DRV_RxInit(), SAI_DRV_TxInit() funtions only.

Regards,
Daniel

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hi Daniel,

Thank you for your update and explanations.

I think we can close this thread.

Regards,

Jakub

0 Kudos
Reply

3,017 Views
jakub_mielczare
Contributor III

Hello Daniel,

Thank you for the answer.

One question: if DMA is used to read data from SAI (in RX mode), do the FIFO pointers still need to be reset, if yes, when?

Regards,

Jakub

0 Kudos
Reply