S32K358 GMAC sends abnormal data

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S32K358 GMAC sends abnormal data

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Hello everyone,

I am bringing up Ethernet using S32K3X8EVB-Q289 Evaluation Board and TJA1103A transceiver working in MII mode. I used example from S32K3(Gmac_Ip_InternalLoopback_S32K358) to bring-up, with some modification to adapt with MII interface. So far, it managed to establish link-up, but it sent abnormal data throughout communication.

sathishkumar_sunmugavel_0-1744883373206.png


I also removed D_CACHE_ENABLE and I_CACHE_ENABLE in pre-processor setting. But it didn't in this case.

I attached the zipped project code, and above captured packet logs. Hope you guy can check it and help me.

Hardware details:
S32K3X8EVB-Q289 Evaluation Board
TJA1103SDB SABRE development board(170-47757 REV C)

Software details:
SW32K3_S32DS_3.5.8_D2311.zip
SW32K3_S32M27x_RTD_R21-11_4.0.0_D2311_DS_updatesite.zip
SW32K3_FreeRTOS_10.6.0_CD_4.0.0_DS_updatesite_D2312.zip
SW32K3_TCPIP_STACK_1_0_4_D2401_DS_updatesite.zip

Thank you in advance.

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PavelL
NXP Employee
NXP Employee

Hello @sathishkumar_sunmugavel ,

there's an issue with the clock in your project.

1. Add this before Clock_Ip_Init:

/* Set RMII configuration for EMAC in DCM module */
IP_DCM_GPR->DCMRWF1 = (IP_DCM_GPR->DCMRWF1 & ~DCM_GPR_DCMRWF1_MAC_CONF_SEL_MASK) | DCM_GPR_DCMRWF1_MAC_CONF_SEL(2U);

2. Your clock shall look like that (it's picture for EMAC, but also valid for GMAC, in this case):

- RX shall be disabled

- I usually used doble frequency on TS clock

image.png

3. TJA1103-SDBR needs to be in rev-RMII mode to generate clock on TXC -> check your jumpers:

image.png

You might also consider to start your project from another example, like lwip_FreeRTOS_S32k358.

FYI, there are Easter holidays on Friday and on Monday, my response will be delayed. Thank you for your understanding.

Best regards,

Pavel

 

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2,121 Views
PavelL
NXP Employee
NXP Employee

Hello @sathishkumar_sunmugavel ,

there's an issue with the clock in your project.

1. Add this before Clock_Ip_Init:

/* Set RMII configuration for EMAC in DCM module */
IP_DCM_GPR->DCMRWF1 = (IP_DCM_GPR->DCMRWF1 & ~DCM_GPR_DCMRWF1_MAC_CONF_SEL_MASK) | DCM_GPR_DCMRWF1_MAC_CONF_SEL(2U);

2. Your clock shall look like that (it's picture for EMAC, but also valid for GMAC, in this case):

- RX shall be disabled

- I usually used doble frequency on TS clock

image.png

3. TJA1103-SDBR needs to be in rev-RMII mode to generate clock on TXC -> check your jumpers:

image.png

You might also consider to start your project from another example, like lwip_FreeRTOS_S32k358.

FYI, there are Easter holidays on Friday and on Monday, my response will be delayed. Thank you for your understanding.

Best regards,

Pavel

 

2,103 Views

Hello @PavelL 

Thank you for your valuable guidance.

I followed the steps you suggested, and I'm happy to share that the issue has been resolved.

Thanks again,
Sathish.

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