S32K312 send uart data fail

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

S32K312 send uart data fail

ソリューションへジャンプ
772件の閲覧回数
jhuang1
Contributor II

Hello, I want to send data via uart + dma, and the program works fine on RTD 2.0.3. But when I transport it to RTD 4.0.0, the uart can only recieve data successfully, it sent "00" always at the trasmitting side. The test program I uploaded recieves data and transmit them out, it can recieve right fix data like 0~16, but transmit 16 zeros. please help me to check the program, thanks.

0 件の賞賛
返信
1 解決策
685件の閲覧回数
Robin_Shen
NXP TechSupport
NXP TechSupport

If it works properly after delete D_CACHE_ENABLE in Defined symbols, then it should be related to data cache.

D_CACHE_ENABLE DMA UART.png

Try putting the buffer in a non cacheable memory section:

#define UART_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
#include "Uart_MemMap.h"
__attribute__(( aligned(32) )) uint8 rxdata[256u];

#define UART_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
#include "Uart_MemMap.h"

 

Are UartSend and UartReceive your own APIs? Do S32K3 RTD APIs such as Uart_AsyncSend and Uart_AsyncReceive work properly?

元の投稿で解決策を見る

0 件の賞賛
返信
3 返答(返信)
745件の閲覧回数
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi 

Please place the buffer in a non cacheable memory section.

In the DMA transfer mode, DMA transfers may have cache coherency problems. To avoid possible coherency issues when D-CACHE is enabled, the user shall ensure that the buffers used as TCD source and destination are allocated in the NON-CACHEABLE area (by means of Uart_Memmap). Otherwise, the Uart driver has some dependencies. User must to put all variables, which were used for transmitter and receiver, in the NON CACHEABLE memory section in the RAM zone by the definition UART_START_SEC_VAR_<INIT_POLICY>_<ALIGNMENT>_NO_CACHEABLE and UART_STOP_SEC_VAR_<INIT_POLICY>_<ALIGNMENT>_NO_CACHEABLE.

DMA transfer mode buffer D-CACHE enabled NON-CACHEABLE.png


Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

0 件の賞賛
返信
741件の閲覧回数
jhuang1
Contributor II

Hi, thank you for reply, I tried to disable the whole dcache before uart test, but the problem hadn't been solved.

/*start uart dma rx*/
UartRxDmaStart(6U, UART_CONFIG.RxDMAChannel);
 
Mcl_CacheDisable(MCL_CACHE_LMEM,MCL_CACHE_ALL_BUS);
Mcl_CacheDisable(MCL_CACHE_CORE,MCL_CACHE_ALL_BUS);
 
    /**************************************************/
    /* Main example loop                              */
    /**************************************************/
    while(1)
    {
    //UartSend(6u,UART_CONFIG.TxDMAChannel,rxdata, 10);
    UartReceive(6u,UART_CONFIG.RxDMAChannel,rxdata,&rxlen,100U);
if(rxlen > 0)
{
 
UartSend(6u,UART_CONFIG.TxDMAChannel,rxdata, rxlen);
 
 
}
 
    }
0 件の賞賛
返信
686件の閲覧回数
Robin_Shen
NXP TechSupport
NXP TechSupport

If it works properly after delete D_CACHE_ENABLE in Defined symbols, then it should be related to data cache.

D_CACHE_ENABLE DMA UART.png

Try putting the buffer in a non cacheable memory section:

#define UART_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
#include "Uart_MemMap.h"
__attribute__(( aligned(32) )) uint8 rxdata[256u];

#define UART_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
#include "Uart_MemMap.h"

 

Are UartSend and UartReceive your own APIs? Do S32K3 RTD APIs such as Uart_AsyncSend and Uart_AsyncReceive work properly?

0 件の賞賛
返信