S32K312 SPI CPOL AND CPHA

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S32K312 SPI CPOL AND CPHA

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chenyh
Contributor II

e14e2ef92135fa426ab6c5ab735a765.png627ea8982685076da496a77ffe40817.png977a3a3834b0b78627bca213ddf1533.jpgI think there is something wrong with my SPI, I don't know where the configuration is wrong, can you tell me?First of all, the SPI of the chip follows CPOL=0 and CPHA=1. I think this should be idle SCK for low level, collecting data at falling edge.So I configured the "SPI" ShiftClockidleLevel for Spi in my S32DS to LOW and "SpiDataShiftEdge" to TRAILING for me given in the graph.However, I captured the waveform diagram of SCK and MOSI through my oscilloscope, and what I can tell you is that the corresponding data of my first 8 SCKS is "00001110". You can see that the MOSI corresponding to the SCK in this waveform is clearly collected for the rising edge. I don't think it's right.You can also see the communication waveform diagram of the chip I gave you. Can you move the corresponding time of SCK or MOSI here, so that the falling edge of SCK corresponds to the data of MOSI? Or you can tell me what I set up wrong, what needs to be changed, or you can give me a correct example. Looking forward to your reply3cb9c812a336a6c85c66f6bae5468a6.png

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @chenyh,

Based on the waveform you posted, the protocol you configured is CPOL = 0, CPHA = 0

danielmartynek_1-1734602210538.png

Read the Transmit Command Register (TCR).

 

Regards,

Daniel

 

 

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chenyh
Contributor II
How should I configure SpiDataShiftEdge and ShiftClockidleLevel? Please take a careful look at my requirements and thank you very much.
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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @chenyh,

If you need CPOL = 0, CPHA = 1,

danielmartynek_2-1734964538359.png

danielmartynek_1-1734964531591.png

 

Regards,

Daniel

 

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