S32K312+RTD400+UART FIFO

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S32K312+RTD400+UART FIFO

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Neo1096
Contributor III

I used S32K312+RTD400 to test the UART POLLING mode. I set the FIFO to 4 datawords, the water value to 2, the timer to 250us, and the baud rate to 230,400

Question: If send_time is set to 4, the sent data will not be lost. When it is greater than 4, some data will be lost. Are 4 words 4 8-bit data? The manual mentions that the DATA register Supports 8-bit, 16-bit, or 32-bit writes, each type of write performing a separate function. An 8-bit write to DATA[7:0] pushes {CTRL[R8T9], CTRL[R9T8], DATA[7:0]} the transmit FIFO with TSC clear. A 16-bit or 32-bit write pushes the data written into the FIFO and does not update the value of CTRL[R8T9] or CTRL[R9T8].

Reads and writes of this register are also involved in the automatic flag clearing mechanisms for some of the LPUART status fields.

Can I arbitrarily understand that FIFO is 32-bit? Then, how can I directly write a 32-bit value?

 

In addition, I want to implement a system where, at intervals of 250us, the remaining space of the TXCOUNTER in water is checked. If it does not exceed the value set for water, an appropriate amount of data is placed in the FIFO. If it exceeds water, no action is taken. What modifications do I need to make based on the current code?

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes, FIFO can be seen as 32bit (word), but here the “word” means single character transmitted/received, which can be programmed to have length of 7-bit, 8-bit, 9-bit or 10-bit.
So every write/read to/from FIFO is for single character.

FIFO depth is 4 words, cannot be configured by TXFIFOSIZE/RXFIFOSIZE, those are read only fields.

In your PIT interrupt you need not to check TDRE and RDRF flags, I think.
RXCOUNT says how many words can be read from FIFO, so how many times Lpuart_Uart_Ip_Getchar can be called.
(4-TXCOUNT) indicates how many words can be written to FIFO, that is how many times Lpuart_Uart_Ip_Putchar can be called.

BR, Petr

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