The issue appears to be related to the following erratum:
Mask Set Errata for Mask 0P55A / 1P55A – Errata [S32K3X4‑0P55A‑1P55A‑ERRATA]
ERR050583: MC_CGM: A functional reset occurring during a clock divider update may trigger a Power‑on Reset sequence.
This erratum is not present in:
Mask Set Errata for Mask 0P09C – Errata [S32K312‑0P09C‑ERRATA]
Yes, the information will be included in the release notes under: ARTDCMCU‑1650.
Regards,
Daniel