S32K3 RTD7.0.0 SWT

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S32K3 RTD7.0.0 SWT

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Jason22
Contributor III

S32K314 RTD7.0.0 IP层

一个RTD5.0.0的SWT例程,运行没问题,将该例程提升至RTD7.0.0后,重新生成了配置代码和驱动代码,发现SWT异常,超时了也不会复位,即使不喂狗也不会复位,SWT配置和RTD7.0.0工程看门狗超时后的寄存器图片如下图所示。企业微信截图_17748505273378.png企业微信截图_17748499584141.png

SWT的寄存器中除了RRR,其他的都和RTD5.0.0的一致。但RTD5.0.0的例程中,MC_RGM的FERD全为0,但RTD7.0.0中全为1,POWER模块中这几项的配置是一样的,查看生成的配置文件也都是0,通过单步调试,发现在时钟初始化中的下图处,会将FERD寄存器都置为1(RTD5.0.0没有出现这样的情况),尝试手动清零没成功,优化等级均为O0,Power_Ip_Inity也没有按照配置文件设置FERD为0,这个寄存器会导致看门狗不进行复位嘛?是否还有其他可能的原因。

企业微信截图_1774851328757.png

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Jason22,

Thank you for pointing this out.

It looks like there is a bug in the RTD Clock driver.

I will update the thread as soon as possible.

 

BR, Daniel

 

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Jason22
Contributor III
Hello, @danielmartynek
Thank you for your support. I want to ask if there's any update on this issue.
BR, Jason
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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Jason22,

This issue is caused by a bug in the RTD.
A ticket has already been created to address it; however, the ticket is still unresolved, and the target RTD fix version has not yet been determined.
As a workaround, you can call Power_Ip_Init before Clock_Ip_Init.

Regards,

Daniel

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Jason22
Contributor III
Hello @danielmartynek
Thank you for your reply.This issue does not seem to arise in the S32K312.
If this issue is solved in the future, where can I see the solution or explanation of this issue? In a file like SW32K3_S32M27x_RTD_R23-11_7.0.0_D2511_ReleaseNotes?

BR,
Jason
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danielmartynek
NXP TechSupport
NXP TechSupport

The issue appears to be related to the following erratum:
Mask Set Errata for Mask 0P55A / 1P55A – Errata [S32K3X4‑0P55A‑1P55A‑ERRATA]
ERR050583: MC_CGM: A functional reset occurring during a clock divider update may trigger a Power‑on Reset sequence.


This erratum is not present in:
Mask Set Errata for Mask 0P09C – Errata [S32K312‑0P09C‑ERRATA]


Yes, the information will be included in the release notes under: ARTDCMCU‑1650.

 

Regards,

Daniel

 
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