S32K146 issue where BusFault is triggered during DFLASH initialization

[Louis1916]

1.According to the customer's software engineer, after the initialization triggers the BusFault, the error of the corresponding address will be repaired according to the logic of the software (the erasure operation will be performed), but during the erasure process, it is found that the FTEx FSTAT MGSTATO MASK is set to 1, resulting in the erasure operation cannot be successfully executed.Under what circumstances will FTEx FSTAT MGSTATO MASK be set to 1?

2.Why does the SEGGER J_Fflash software report a message "Erase Failed" when I use SEGGER J_Fflash software and JLink debugger to erase, but I can find that the erase has been implemented on KEIL?

3.Why can't the executed erase function in the software be successfully erased, but the external debugger can?

[danielmartynek]

Hi @Louis1916,

1.

MGSTAT0 is set when the Sector Erase verification fails, that mean the sector is not properly erased.

Have you tried repeating the Sector Erase operation at the sector?

Do you see the problem with just one sector or more?

Can you replicate it on other MCUs or is it just one sample that does that?

Note that the cyclic endurance of the flash is 1000 cycles, above that, NXP does not gurantee its functionality.

2.

Please contact KEIL

3.

In Q2, you mentioned that SEGGER J_Flash software reports a message "Erase Failed" too.

Is this a different scenario?

What is the address of the sector?

Is the system clock configuration within the specification?

Regards,

Daniel

[Louis1916]

Hi Daniel.

1.The verification fails when erasing,Under what circumstances does the sector erase verification fail and what are the reasons?

The corresponding sector address is (0x10004800--0x10004FFF), it is triggered repeatedly
The BusFault is incorrect and belongs to a precise data access conflict, and repeated attempts are made to clear the data of the entire SECTOR.This error condition only occurs in one SECTOR.

Except for the chip that has already had the error condition "BusFault triggered and is a precise data access violation", the other chips failed to reproduce the error;

The customer can ensure that the erase and write times of the DFLASH part of the chip are within its cycle life;

2.The system clock configuration is determined to be within the specification;

  The underlying function of the software to perform the erase operation is FLASH_DRV_CommandSequence(), and the specific code of the function is shown in the following figure:

[danielmartynek]

Hi @Louis1916,

The flash got probably damaged, because this is just one sector on one MCU sample, there is nothing we can do, unfortunately.

Hard to determin the root cause, it could be due to ESD, for example.

Refer to AN12130 Production Flash Programming Best Practices for S32K1xx MCUs

5 Common problems

https://www.nxp.com/docs/en/application-note/AN12130.pdf

[Louis1916]

Hi Daniel.
What the customer engineer was puzzled about: The chip that uses SEGGER J_Fflash software and JLink debugger to erase the single SECTOR (0x10004800--0x10004FFF) with BusFault can operate normally.
However, the underlying function of the software to perform the erase operation is FLASH_DRV_CommandSequence(), and an error is reported。Why can it be erased normally by the tool, but it can't be directly commanded?Thanks！

[danielmartynek · Accepted solution]

Hi @Louis1916,

It is hard to say, the tool uses the same FTFC command to erase the sector, but the MCU is likely in the default (out of reset) configuration during the flash operation while the core and other masters are inactive.