S32K146 SPI Master mode Send Datas issue

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S32K146 SPI Master mode Send Datas issue

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学辉王
Contributor I

Hi :

   The SPI  setting as below:

111.png

Then, Send 5 bytes data . 4v1044oo1.png

Why ? There is a delay between the fourth and fifth data.  The delay time is about 14 us.

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razva_tilimpea
NXP Employee
NXP Employee

Hi,

Because the frequency of the SPI is high the CPU doesn't have enough time to fill up the TX fifo.

To avoid this problem I suggest 2 solution:

1. Use LPSPI in DMA mode to reduce  the CPU load

2. Increase core frequency.

Best regards,

Razvan

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学辉王
Contributor I

Hi:

    Thanks for your response.

     My system oscillator clock(SOSC_CLK) is 8Mhz, SPLL_CLK is 112Mhz, The SPI Clock is SPLLDIV2(56Mhz), Spi Baudrate is 2Mhz.

     As you say, Use LPSPI in DMA mode to send data.  But the delay time is still exist.

    

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razva_tilimpea
NXP Employee
NXP Employee

Hi,

Can you try to disable the continuous mode?

If the delay is removed I suppose that it is caused by the computation necessary to update LPSPI configuration to set PCS high after last transfer.

You can change the LPSPI configuration to obtain the same results. Set bits/frame to 40 and for receive and transmit buffers please use uint32_t data.

Best regards,

Razvan

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学辉王
Contributor I

Hi,

  1.  Set bits/frame to 8 and disable the continuous mode , it is ok. But i need sending 40 bits data during PCS enable.

  2. Set bits/frame to 40 and for receive and transmit buffers please use uint32_t data.

  The  pic  as below:

123.png

fifth data is 0xff, it is wrong data. 

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razva_tilimpea
NXP Employee
NXP Employee

Hi,

This is in Interrupt mode or DMA mode?

Can you send me how do you use Send functions and what are the values from tx buffer?

Razvan

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