Hi, I am trying to enable the system MPU within S32K144 as it doesn’t support Arm MPU.
I have defined 3 regions
Flash: -rx- (0x0 to 0x0007FFFF)
RAM: -rw- (0x10080000 to 0x20007FFF) Periheral region: -rw- (0x40000000 to 0x400FFFFF)
I am getting HARDFAULT or BUSFAULT when I try to test this by writing to flash region with pointer, execute from RAM or peripheral address using function pointers. But I am not seeing that CESR being set which gives info about these access violations caused by test code. Need insights about it. below is my RTD generated config which is generated using S32DS mex.
const Mpu_Ip_RegionConfigType Mpu_Configuration_RegionConfig[4] =
{
/* Region Configuration 0 */
{ 0UL, 4294967295UL, (MPU_SUPERVISOR_MODE_AS_USER_MODE << MPU_RGD_WORD2_M0SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_AS_USER_MODE << MPU_RGD_WORD2_M1SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_AS_USER_MODE << MPU_RGD_WORD2_M2SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_AS_USER_MODE << MPU_RGD_WORD2_M3SM_SHIFT) | \ (MPU_USER_MODE_RWX << MPU_RGD_WORD2_M0UM_SHIFT) | \ (MPU_USER_MODE_RWX << MPU_RGD_WORD2_M1UM_SHIFT) | \ (MPU_USER_MODE_RWX << MPU_RGD_WORD2_M2UM_SHIFT) | \ (MPU_USER_MODE_RWX << MPU_RGD_WORD2_M3UM_SHIFT), (0U), (0U) },
/* Region Configuration 1 */
{ 536838144UL, 536899583UL, (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M0SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M1SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M2SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RWX << MPU_RGD_WORD2_M3SM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M0UM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M1UM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M2UM_SHIFT) | \ (MPU_USER_MODE_NONE << MPU_RGD_WORD2_M3UM_SHIFT), (0U), (0U) },
/* Region Configuration 2 */
{ 1073741824UL, 1074790399UL, (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M0SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M1SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RW << MPU_RGD_WORD2_M2SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RWX << MPU_RGD_WORD2_M3SM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M0UM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M1UM_SHIFT) | \ (MPU_USER_MODE_RW << MPU_RGD_WORD2_M2UM_SHIFT) | \ (MPU_USER_MODE_NONE << MPU_RGD_WORD2_M3UM_SHIFT), (0U), (0U) },
/* Region Configuration 3 */
{ 0UL, 524287UL, (MPU_SUPERVISOR_MODE_RX << MPU_RGD_WORD2_M0SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RX << MPU_RGD_WORD2_M1SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RX << MPU_RGD_WORD2_M2SM_SHIFT) | \ (MPU_SUPERVISOR_MODE_RWX << MPU_RGD_WORD2_M3SM_SHIFT) | \ (MPU_USER_MODE_RX << MPU_RGD_WORD2_M0UM_SHIFT) | \ (MPU_USER_MODE_RX << MPU_RGD_WORD2_M1UM_SHIFT) | \ (MPU_USER_MODE_RX << MPU_RGD_WORD2_M2UM_SHIFT) | \ (MPU_USER_MODE_NONE << MPU_RGD_WORD2_M3UM_SHIFT), (0U), (0U) } };
Region 0 (debug) is left to its default A swift response would be appropriated. thanks in advance best regards
Hello @akumars4,
Can you please share the .mex file of the project?
The flash cannot be written anyway, it can be programmed by the FTFC module only.
Regarding SRAM, where do you place the function pointer?
Peripherals are not protected by the MPU.
Regards,
Daniel
Hi @danielmartynek ,
Thank you for getting back to me.
I understand that the MPU has a limited number of regions available for configuration and can only cover a subset of the on-chip peripherals.
For your reference, I’ve attached the RTD-generated mpu_config file. Please take a look and let me know if the configuration seems appropriate or if any adjustments are needed.
If required, I can also share the .mex file to assist further with your analysis.
Additionally, I have attached the test code I used to validate different MPU region descriptor configurations mpu_test.c
Kindly let me know your thoughts.