When I set up partitions, enable CSEc function, generate MASTER_KEY and restore factory settings, repeated restarts will cause the chip to not connect to JLink. What is the reason? Is there a remedy available?
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If the CSEc is still enabled and the flash configuration field is erased, there's no way to recover.
the only limitation I know is that JLink cannot be used to load new application once the CSEc is enabled. It's because JLink uses mass erase which is not allowed when CSEc is enabled. For example, Pemicro erases the flash block by block, so it works. I'm not sure if Segger already changed this, you can ask them directly.
If CMD_DBG_AUTH command was successful, I can't see a reason why it does not work. Are you sure you got ERC_NO_ERROR?
Regards,
Lukas
The Jlink download program is downloaded directly by pressing F7, without erasing the chip. Theoretically, F7 will not erase the DFlash area. I confirm that CMD-DBG_SUTH is successful, as shown in the following figure
The Jlink download program is downloaded directly by pressing F7, without erasing the chip. Theoretically, F7 will not erase the DFlash area. I confirm that CMD-DBG_SUTH is successful, as shown in the following figure. In addition, after CMD_SBG_SUTH is successful, the dflash area is not reallocated, and CSEC_DRV_Init is not called. MASTER_KEY (CSEC_DRV_LoadKey (CSEC_MASTER-ECU, M1, M2, M3, M4_out, M5_out) is directly loaded.) Although it returns an error, will this cause the chip to lock up when powered on next time.
This really should not cause any lock up. I do not have JLink but I have never had a problem when using other debuggers either from Pemicro or from Lauterbach. Once CMD_DBG_AUTH was successful, I could always start from the beggining. Even if you try to load a key after reseting a device back to factory state, nothing will happen, the command will be simply ignored. I tested this too in the past. So, I'm not really sure what's the problem on your side.
If JLink loads a project to RAM, it won't erase the flash. But if it is a flash project, I'm sure it erases the flash.
Regards,
Lukas
When I first generated and loaded CSEC_MASTER-ECU, the return was successful. Afterwards, CSEc was restored to factory settings and returned successfully. Immediately after, I generated and loaded CSEC_MASTER-ECU again, and the result returned was also successful. But when I tried to reset CSEc to factory settings, I returned an error code. Why is that?
Are you sure you used the right MASTER_ECU_KEY second time?
And second possible reason - this could happen if you loaded a key which has WRITE_PROTECT attribute set.
These are the only reasons I can see. There are no known issues which could cause this.
Regards,
Lukas
The reason for the lock is that when csec is enabled, jlink is used to perform the download program operation. As shown in the figure below, before downloading, jlink will first erase the chip, and the erase area contains dflash, which may cause the chip to lock. How can the chip be unlocked in this situation?
In the locked state, the waveform of the reset pin is as follows
The flash algorithm used by JLink is proprietary of Segger, I don't know what is does exactly. It's possible that it tried to run mass erase but that's not allowed due to enabled CSEc. Maye it tried to erase the flash by sectors, so the Flash Configuration Field was erased and then it crashed for another reason resulting to lockup. But this is a speculation only.
From application note AN12130:
Regards,
Lukas
If the chip is locked due to erasing the chip while CSEc is enabled, is there any way to unlock it?
If the CSEc is still enabled and the flash configuration field is erased, there's no way to recover.